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Paper Abstract and Keywords
Presentation 2016-10-21 09:00
Attempt for Determining Cryptographic Circuit Blocks Leaking Side-Channel Information Based on Internal Current Source -- Examination with FPGA Implementation of AES Circuits --
Kengo Iokibe, Naoki Kawata, Yusuke Yano, Hiroto Kagotani, Yoshitaka Toyota (Okayama Univ.) EMCJ2016-74 MW2016-106 EST2016-70
Abstract (in Japanese) (See Japanese page) 
(in English) For efficient security enhancement of cryptographic ICs against side-channel attacks (SCAs), it is important to identify the circuit part that leaks information.
In this study, we observed variation in information leakage behavior of different FPGA implementations of cryptographic circuits.
The observation was based on EMC macro-model that could be useful in evaluating cryptographic circuits in terms of vulnerability to SCAs.
First, we implemented four advanced encryption standard (AES) circuits on the FPGA.
They were different in strength of SCA countermeasure.
Next, we measured impedance of power network of FPGA for the four implementations to identify the EMC macro-model.
The measured impedances were found that they had different resistances in the low frequency range.
Then we identified the equivalent current source of FPGA core circuit and finally analyzed the current source by the correlation power analysis (CPA) method, one of the most powerful analysis methods in SCAs.
We found that differences in strength of the SCA countermeasure were distinguishable in traces of correlation coefficients that were resultant of CPA.
This suggested that the EMC macro-model could be useful for SCA vulnerability evaluation of cryptographic circuits.
Keyword (in Japanese) (See Japanese page) 
(in English) EM information leakage / side-channel attack / EMC macro model / equivalent circuit / correlation power analysis / Advanced Encryption Standard / cryptograph /  
Reference Info. IEICE Tech. Rep., vol. 116, no. 253, EMCJ2016-74, pp. 79-84, Oct. 2016.
Paper # EMCJ2016-74 
Date of Issue 2016-10-13 (EMCJ, MW, EST) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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Download PDF EMCJ2016-74 MW2016-106 EST2016-70

Conference Information
Committee EMCJ IEE-EMC MW EST  
Conference Date 2016-10-20 - 2016-10-21 
Place (in Japanese) (See Japanese page) 
Place (in English) Tohoku Univ. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Microwave, Electromagnetic simulation, EMC, etc. 
Paper Information
Registration To EMCJ 
Conference Code 2016-10-EMCJ-EMC-MW-EST 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Attempt for Determining Cryptographic Circuit Blocks Leaking Side-Channel Information Based on Internal Current Source 
Sub Title (in English) Examination with FPGA Implementation of AES Circuits 
Keyword(1) EM information leakage  
Keyword(2) side-channel attack  
Keyword(3) EMC macro model  
Keyword(4) equivalent circuit  
Keyword(5) correlation power analysis  
Keyword(6) Advanced Encryption Standard  
Keyword(7) cryptograph  
Keyword(8)  
1st Author's Name Kengo Iokibe  
1st Author's Affiliation Okayama University (Okayama Univ.)
2nd Author's Name Naoki Kawata  
2nd Author's Affiliation Okayama University (Okayama Univ.)
3rd Author's Name Yusuke Yano  
3rd Author's Affiliation Okayama University (Okayama Univ.)
4th Author's Name Hiroto Kagotani  
4th Author's Affiliation Okayama University (Okayama Univ.)
5th Author's Name Yoshitaka Toyota  
5th Author's Affiliation Okayama University (Okayama Univ.)
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Speaker Author-1 
Date Time 2016-10-21 09:00:00 
Presentation Time 25 minutes 
Registration for EMCJ 
Paper # EMCJ2016-74, MW2016-106, EST2016-70 
Volume (vol) vol.116 
Number (no) no.253(EMCJ), no.254(MW), no.255(EST) 
Page pp.79-84 
#Pages
Date of Issue 2016-10-13 (EMCJ, MW, EST) 


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