Paper Abstract and Keywords |
Presentation |
2016-10-27 15:25
Self-Calibration and Trigger Circuit for 2-Step SAR TDC Takashi Ida, Yuki Ozawa, Richen Jiang, Haruo Kobayashi (Gunma Univ.), Ryoji Shiota (socionext) CAS2016-48 NLP2016-74 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
This paper presents a 2-step successive-approximation-register time-to-digital converter (SAR TDC) architecture with its linearity self-calibrations for absolute (average) delay array variations. It also employs a trigger circuit which enables to measure one-shot timing with the SAR ADC; If the trigger circuit is not used in front of our SAR TDC, it can only measure the repetitive clock timing but not the one-shot timing. Their configurations, principles and operations as well as some simulation results are described. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Time-to-Digital Converter / Successive Approximation / Vernier Delay Line / Trigger Circuit / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 116, no. 271, CAS2016-48, pp. 55-60, Oct. 2016. |
Paper # |
CAS2016-48 |
Date of Issue |
2016-10-20 (CAS, NLP) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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CAS2016-48 NLP2016-74 |
Conference Information |
Committee |
CAS NLP |
Conference Date |
2016-10-27 - 2016-10-28 |
Place (in Japanese) |
(See Japanese page) |
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(See Japanese page) |
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Paper Information |
Registration To |
CAS |
Conference Code |
2016-10-CAS-NLP |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Self-Calibration and Trigger Circuit for 2-Step SAR TDC |
Sub Title (in English) |
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Keyword(1) |
Time-to-Digital Converter |
Keyword(2) |
Successive Approximation |
Keyword(3) |
Vernier Delay Line |
Keyword(4) |
Trigger Circuit |
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1st Author's Name |
Takashi Ida |
1st Author's Affiliation |
Gunma University (Gunma Univ.) |
2nd Author's Name |
Yuki Ozawa |
2nd Author's Affiliation |
Gunma University (Gunma Univ.) |
3rd Author's Name |
Richen Jiang |
3rd Author's Affiliation |
Gunma University (Gunma Univ.) |
4th Author's Name |
Haruo Kobayashi |
4th Author's Affiliation |
Gunma University (Gunma Univ.) |
5th Author's Name |
Ryoji Shiota |
5th Author's Affiliation |
socionext Inc. (socionext) |
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Speaker |
Author-1 |
Date Time |
2016-10-27 15:25:00 |
Presentation Time |
25 minutes |
Registration for |
CAS |
Paper # |
CAS2016-48, NLP2016-74 |
Volume (vol) |
vol.116 |
Number (no) |
no.271(CAS), no.272(NLP) |
Page |
pp.55-60 |
#Pages |
6 |
Date of Issue |
2016-10-20 (CAS, NLP) |
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