Paper Abstract and Keywords |
Presentation |
2016-11-29 09:25
Optimal configuration design of SCM and MLC/TLC NAND flash memory in semiconductor storage system Chihiro Matsui, Yusuke Yamaga, Yusuke Sugiyama, Ken Takeuchi (Chuo Univ.) CPM2016-77 ICD2016-38 IE2016-72 Link to ES Tech. Rep. Archives: CPM2016-77 ICD2016-38 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In order to manage wide variety of data at high speed, a tri-hybrid storage system has been proposed with using storage class memory (SCM), multi-cell level (MLC)/triple-level cell (TLC) NAND flash memory. SCM can read and write at high speed, but the cost is high. On the other hand, TLC NAND flash has large capacity with low cost, but the reading and writing speed is longer than that of MLC NAND flash. With considering memory characteristics, optimal memory configuration in the tri-hybrid storage is analyzed. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Storage class memory / NAND flash memory / semiconductor storage / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 116, no. 334, ICD2016-38, pp. 7-10, Nov. 2016. |
Paper # |
ICD2016-38 |
Date of Issue |
2016-11-22 (CPM, ICD, IE) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
CPM2016-77 ICD2016-38 IE2016-72 Link to ES Tech. Rep. Archives: CPM2016-77 ICD2016-38 |
Conference Information |
Committee |
VLD DC CPSY RECONF CPM ICD IE |
Conference Date |
2016-11-28 - 2016-11-30 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Ritsumeikan University, Osaka Ibaraki Campus |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Design Gaia 2016 -New Field of VLSI Design- |
Paper Information |
Registration To |
ICD |
Conference Code |
2016-11-VLD-DC-CPSY-RECONF-CPM-ICD-IE |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Optimal configuration design of SCM and MLC/TLC NAND flash memory in semiconductor storage system |
Sub Title (in English) |
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Keyword(1) |
Storage class memory |
Keyword(2) |
NAND flash memory |
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semiconductor storage |
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1st Author's Name |
Chihiro Matsui |
1st Author's Affiliation |
Chuo University (Chuo Univ.) |
2nd Author's Name |
Yusuke Yamaga |
2nd Author's Affiliation |
Chuo University (Chuo Univ.) |
3rd Author's Name |
Yusuke Sugiyama |
3rd Author's Affiliation |
Chuo University (Chuo Univ.) |
4th Author's Name |
Ken Takeuchi |
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Chuo University (Chuo Univ.) |
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Speaker |
Author-1 |
Date Time |
2016-11-29 09:25:00 |
Presentation Time |
25 minutes |
Registration for |
ICD |
Paper # |
CPM2016-77, ICD2016-38, IE2016-72 |
Volume (vol) |
vol.116 |
Number (no) |
no.333(CPM), no.334(ICD), no.335(IE) |
Page |
pp.7-10 |
#Pages |
4 |
Date of Issue |
2016-11-22 (CPM, ICD, IE) |
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