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Paper Abstract and Keywords
Presentation 2016-12-15 15:30
[Poster Presentation] Study about Optimization of Operational Amplifier for Gain Stages in the Pipeline ADC
Daisuke Fujinami, Masahiro Sasaki (SIT) ICD2016-83 CPSY2016-89
Abstract (in Japanese) (See Japanese page) 
(in English) A pipeline ADC (Analog to Digital Converter) comprises multiple stages connected by cascading whose main components are sample & hold, DAC (Digital to Analog Converter), ADC and amplifier circuit. In the pipeline ADC, to minimize the gain error, the operational amplifier of initial stage is required to have high gain, but it causes increasing its area and power consumption. Whereas, since the subsequent stages require less accuracy than the preceding stages, lower gain amplifier may be utilized for these stages. This means that it is possible to use a low gain operational amplifier as it goes to the subsequent stage, and it is possible to reduce the area and power consumption. Therefore, in this research, we calculate the optimum gain of the operational amplifiers to accomplish the required accuracy for each stage, and examine the effect for the reduction of the area and power consumption.
Keyword (in Japanese) (See Japanese page) 
(in English) pipeline / area / operational amplifier / power consumption / / / /  
Reference Info. IEICE Tech. Rep., vol. 116, no. 364, ICD2016-83, pp. 93-93, Dec. 2016.
Paper # ICD2016-83 
Date of Issue 2016-12-08 (ICD, CPSY) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee ICD CPSY  
Conference Date 2016-12-15 - 2016-12-16 
Place (in Japanese) (See Japanese page) 
Place (in English) Tokyo Institute of Technology 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To ICD 
Conference Code 2016-12-ICD-CPSY 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Study about Optimization of Operational Amplifier for Gain Stages in the Pipeline ADC 
Sub Title (in English)  
Keyword(1) pipeline  
Keyword(2) area  
Keyword(3) operational amplifier  
Keyword(4) power consumption  
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1st Author's Name Daisuke Fujinami  
1st Author's Affiliation Shibaura Institute of Technology (SIT)
2nd Author's Name Masahiro Sasaki  
2nd Author's Affiliation Shibaura Institute of Technology (SIT)
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Speaker Author-1 
Date Time 2016-12-15 15:30:00 
Presentation Time 120 minutes 
Registration for ICD 
Paper # ICD2016-83, CPSY2016-89 
Volume (vol) vol.116 
Number (no) no.364(ICD), no.365(CPSY) 
Page p.93 
#Pages 1 
Date of Issue 2016-12-08 (ICD, CPSY) 

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