Information: Join today and make your research activities more affordable! Technical workshop participation fees and annual registration fees are available at member rates.
Notice: [Important] Announcement of Changes to Registration Fee Payment and Manuscript Upload Procedures for IEICE Technical Meetings
IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2017-01-26 14:45
[Poster Presentation] Design of Regulator Circuit with Over-temperature Protection for Silicon Intelligent Neural Probes
Satoru Nishino (Nagasaki Institute of Applied Science Univ), Keita Ito, Yoshiki Takezawa, Kenji Shimokawa, Tatsuya Goto, Shoma Uno, Hisashi Kino, Tetsu Tanaka (TOHOKU Univ), Koji Kiyoyama (Nagasaki Institute of Applied Science Univ) EE2016-62
Abstract (in Japanese) (See Japanese page) 
(in English) In recent years, there has been rapid development and increasing use of semiconductor technologies for recording from large numbers of neurons. To enable chronic and stable neural recording, we have been developing an implantable multi channel neural recording system. In this paper, the objective is to monitor and protect so that the heat generation of the system does not damage the living tissue when performing long-term recording and stimulation by wearing or implanting Silicon Intelligent Neural Probes in the living body. We propose a power supply circuit (linear regulator) that performs overheat protection operation by feeding back the operating temperature of the system.
Keyword (in Japanese) (See Japanese page) 
(in English) Bio-signal measuring / Over-temperature protection / Regulator circuit / / / / /  
Reference Info. IEICE Tech. Rep., vol. 116, no. 429, EE2016-62, pp. 75-79, Jan. 2017.
Paper # EE2016-62 
Date of Issue 2017-01-19 (EE) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF EE2016-62

Conference Information
Committee EE  
Conference Date 2017-01-26 - 2017-01-27 
Place (in Japanese) (See Japanese page) 
Place (in English) Nagasaki University 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To EE 
Conference Code 2017-01-EE 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Design of Regulator Circuit with Over-temperature Protection for Silicon Intelligent Neural Probes 
Sub Title (in English)  
Keyword(1) Bio-signal measuring  
Keyword(2) Over-temperature protection  
Keyword(3) Regulator circuit  
Keyword(4)  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Satoru Nishino  
1st Author's Affiliation Nagasaki Institute of Applied Science University (Nagasaki Institute of Applied Science Univ)
2nd Author's Name Keita Ito  
2nd Author's Affiliation TOHOKU University (TOHOKU Univ)
3rd Author's Name Yoshiki Takezawa  
3rd Author's Affiliation TOHOKU University (TOHOKU Univ)
4th Author's Name Kenji Shimokawa  
4th Author's Affiliation TOHOKU University (TOHOKU Univ)
5th Author's Name Tatsuya Goto  
5th Author's Affiliation TOHOKU University (TOHOKU Univ)
6th Author's Name Shoma Uno  
6th Author's Affiliation TOHOKU University (TOHOKU Univ)
7th Author's Name Hisashi Kino  
7th Author's Affiliation TOHOKU University (TOHOKU Univ)
8th Author's Name Tetsu Tanaka  
8th Author's Affiliation TOHOKU University (TOHOKU Univ)
9th Author's Name Koji Kiyoyama  
9th Author's Affiliation Nagasaki Institute of Applied Science University (Nagasaki Institute of Applied Science Univ)
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
21st Author's Name  
21st Author's Affiliation ()
22nd Author's Name  
22nd Author's Affiliation ()
23rd Author's Name  
23rd Author's Affiliation ()
24th Author's Name  
24th Author's Affiliation ()
25th Author's Name  
25th Author's Affiliation ()
26th Author's Name / /
26th Author's Affiliation ()
()
27th Author's Name / /
27th Author's Affiliation ()
()
28th Author's Name / /
28th Author's Affiliation ()
()
29th Author's Name / /
29th Author's Affiliation ()
()
30th Author's Name / /
30th Author's Affiliation ()
()
31st Author's Name / /
31st Author's Affiliation ()
()
32nd Author's Name / /
32nd Author's Affiliation ()
()
33rd Author's Name / /
33rd Author's Affiliation ()
()
34th Author's Name / /
34th Author's Affiliation ()
()
35th Author's Name / /
35th Author's Affiliation ()
()
36th Author's Name / /
36th Author's Affiliation ()
()
Speaker Author-1 
Date Time 2017-01-26 14:45:00 
Presentation Time 80 minutes 
Registration for EE 
Paper # EE2016-62 
Volume (vol) vol.116 
Number (no) no.429 
Page pp.75-79 
#Pages
Date of Issue 2017-01-19 (EE) 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan