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Paper Abstract and Keywords
Presentation 2017-01-27 16:15
High Speed Response POL with Parallel Number Switching Function According to Load Condition
Shogo Hirota, Akinori Hariya, Yoichi Ishizuka (Nagasaki Univ.) EE2016-88
Abstract (in Japanese) (See Japanese page) 
(in English) This paper presents the high speed response POL with parallel number switching function according to load condition. The proposed method achieves high power efficiency over a wide load current range as compared with the case without switching the parallel number. The control circuit suppresses the delay time of the control loop to nanosecond level. In the experiments, it was confirmed the static characteristics, the transient response and the frequency characteristics of open loop transfer function with GaN-HEMT 1MHz-48V/5V non-isolated POL. This paper discusses these results, and reveals the validity of the proposed technique. As the results, it achieves high power efficiency over a wide load current range by switching the parallel number and the time-delay is suppressed to 11.15ns. In the frequency characteristics, it can be confirmed that phase margin is about 57degree and cross over frequency is about 169kHz.
Keyword (in Japanese) (See Japanese page) 
(in English) POL / Digital Control / Parallel Connection / / / / /  
Reference Info. IEICE Tech. Rep., vol. 116, no. 429, EE2016-88, pp. 213-218, Jan. 2017.
Paper # EE2016-88 
Date of Issue 2017-01-19 (EE) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF EE2016-88

Conference Information
Committee EE  
Conference Date 2017-01-26 - 2017-01-27 
Place (in Japanese) (See Japanese page) 
Place (in English) Nagasaki University 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To EE 
Conference Code 2017-01-EE 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) High Speed Response POL with Parallel Number Switching Function According to Load Condition 
Sub Title (in English)  
Keyword(1) POL  
Keyword(2) Digital Control  
Keyword(3) Parallel Connection  
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1st Author's Name Shogo Hirota  
1st Author's Affiliation Nagasaki University (Nagasaki Univ.)
2nd Author's Name Akinori Hariya  
2nd Author's Affiliation Nagasaki University (Nagasaki Univ.)
3rd Author's Name Yoichi Ishizuka  
3rd Author's Affiliation Nagasaki University (Nagasaki Univ.)
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Speaker Author-1 
Date Time 2017-01-27 16:15:00 
Presentation Time 30 minutes 
Registration for EE 
Paper # EE2016-88 
Volume (vol) vol.116 
Number (no) no.429 
Page pp.213-218 
#Pages 6 
Date of Issue 2017-01-19 (EE) 

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