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Paper Abstract and Keywords
Presentation 2017-03-02 09:50
Reliability enhancement of Hierarchical data reading circuit of Wafer scale mask ROM
Takaaki Yokoyama, Ochi Hiroyuki (Ritsumeikan Univ) VLD2016-110
Abstract (in Japanese) (See Japanese page) 
(in English) In the national libraries of developed countries, there is a demand to store large amounts of data in a digital form over a long period of time, but the lifetime of existing media is about 10 to 200 years, which is very short compared with that of analog media. As a solution to the problem, a media which permanently stores data using mask ROM has been proposed.
In this paper, we propose a modified Binary Sequencer which controls hierarchical read operation within the H-tree architecture used in wafer scale mask ROM. We also propose an effective method for implementing the H-tree architecture by combining two kind of proposed BS with conventional BS, and evaluated trade-off between reliability and area.
Keyword (in Japanese) (See Japanese page) 
(in English) H-tree architecture / power gating / TMR / WDT / long-term digital storage media / / /  
Reference Info. IEICE Tech. Rep., vol. 116, no. 478, VLD2016-110, pp. 49-54, March 2017.
Paper # VLD2016-110 
Date of Issue 2017-02-22 (VLD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2016-110

Conference Information
Committee VLD  
Conference Date 2017-03-01 - 2017-03-03 
Place (in Japanese) (See Japanese page) 
Place (in English) Okinawa Seinen Kaikan 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To VLD 
Conference Code 2017-03-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Reliability enhancement of Hierarchical data reading circuit of Wafer scale mask ROM 
Sub Title (in English)  
Keyword(1) H-tree architecture  
Keyword(2) power gating  
Keyword(3) TMR  
Keyword(4) WDT  
Keyword(5) long-term digital storage media  
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1st Author's Name Takaaki Yokoyama  
1st Author's Affiliation Ritsumeikan University (Ritsumeikan Univ)
2nd Author's Name Ochi Hiroyuki  
2nd Author's Affiliation Ritsumeikan University (Ritsumeikan Univ)
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Speaker Author-1 
Date Time 2017-03-02 09:50:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2016-110 
Volume (vol) vol.116 
Number (no) no.478 
Page pp.49-54 
#Pages 6 
Date of Issue 2017-02-22 (VLD) 

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