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Paper Abstract and Keywords
Presentation 2017-06-20 09:30
Deductive Verification Method of real-time safety properties for embedded assembly program -- □≦TIME q = □(q∧(time≦TIME)) --
Satoshi Yamane (Kanazawa Univ.) CAS2017-12 VLD2017-15 SIP2017-36 MSS2017-12
Abstract (in Japanese) (See Japanese page) 
(in English) It is important to verify both the correctness and real-time properties for embedded systems.
In this paper, we propose deductive verification method in order to verify real-time safety properties based on discrete time as folllows:
(1)First we construct a state transition system including the execution time.
(2)Next we verify whether a state transition system satisfies RTLTL formulas by deductive verification.
Keyword (in Japanese) (See Japanese page) 
(in English) embedded assembly program / verifying real-time safety properties / deductive verification / real-time temporal logic / / / /  
Reference Info. IEICE Tech. Rep., vol. 117, no. 99, MSS2017-12, pp. 59-64, June 2017.
Paper # MSS2017-12 
Date of Issue 2017-06-12 (CAS, VLD, SIP, MSS) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CAS2017-12 VLD2017-15 SIP2017-36 MSS2017-12

Conference Information
Committee SIP CAS MSS VLD  
Conference Date 2017-06-19 - 2017-06-20 
Place (in Japanese) (See Japanese page) 
Place (in English) Niigata University, Ikarashi Campus 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To MSS 
Conference Code 2017-06-SIP-CAS-MSS-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Deductive Verification Method of real-time safety properties for embedded assembly program 
Sub Title (in English) □≦TIME q = □(q∧(time≦TIME)) 
Keyword(1) embedded assembly program  
Keyword(2) verifying real-time safety properties  
Keyword(3) deductive verification  
Keyword(4) real-time temporal logic  
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1st Author's Name Satoshi Yamane  
1st Author's Affiliation Kanazawa University (Kanazawa Univ.)
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Speaker Author-1 
Date Time 2017-06-20 09:30:00 
Presentation Time 20 minutes 
Registration for MSS 
Paper # CAS2017-12, VLD2017-15, SIP2017-36, MSS2017-12 
Volume (vol) vol.117 
Number (no) no.96(CAS), no.97(VLD), no.98(SIP), no.99(MSS) 
Page pp.59-64 
#Pages 6 
Date of Issue 2017-06-12 (CAS, VLD, SIP, MSS) 

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