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Paper Abstract and Keywords
Presentation 2017-07-26 14:00
A Study on Implementation Method of Byzantine Fault Tolerant Systems
Takeru Nanao, Yudai Ishikawa, Masashi Imai (Hirosaki Univ.) DC2017-17
Abstract (in Japanese) (See Japanese page) 
(in English) A fault tolerant system does not cause a failure even if a fault occurs. The algorithm OM has been proposed as a basic Byzantine fault tolerant algorithm for distributed systems. In the algorithm OM, values received through different paths are used in order to agree the correct values. In this study, a fault tolerant PC cluster system is constructed and evaluated using the Raspberry-Pi devices based on the algorithm OM. And then, we try to reduce the number of communications by using MPI group communication instructions in order to improve the performance of the system. However, in the real environments, it is confirmed that the overhead is large and the improvement of the performance is limited. Thus, we propose an implementation method for constructing a more practical fault tolerant system using the DTTR method.
Keyword (in Japanese) (See Japanese page) 
(in English) Fault tolerant system / Byzantine fault / PC cluster system / Parallel distributed processing / DTTR(Duplication with Temporary TMR and Reconfiguration) / LVS(Linux Virtual Server) / /  
Reference Info. IEICE Tech. Rep., vol. 117, no. 154, DC2017-17, pp. 7-12, July 2017.
Paper # DC2017-17 
Date of Issue 2017-07-19 (DC) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF DC2017-17

Conference Information
Committee CPSY DC IPSJ-ARC  
Conference Date 2017-07-26 - 2017-07-28 
Place (in Japanese) (See Japanese page) 
Place (in English) Akita Atorion-Building (Akita) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Parallel, Distributed and Cooperative Processing 
Paper Information
Registration To DC 
Conference Code 2017-07-CPSY-DC-ARC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Study on Implementation Method of Byzantine Fault Tolerant Systems 
Sub Title (in English)  
Keyword(1) Fault tolerant system  
Keyword(2) Byzantine fault  
Keyword(3) PC cluster system  
Keyword(4) Parallel distributed processing  
Keyword(5) DTTR(Duplication with Temporary TMR and Reconfiguration)  
Keyword(6) LVS(Linux Virtual Server)  
Keyword(7)  
Keyword(8)  
1st Author's Name Takeru Nanao  
1st Author's Affiliation Hirosaki University (Hirosaki Univ.)
2nd Author's Name Yudai Ishikawa  
2nd Author's Affiliation Hirosaki University (Hirosaki Univ.)
3rd Author's Name Masashi Imai  
3rd Author's Affiliation Hirosaki University (Hirosaki Univ.)
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Speaker Author-1 
Date Time 2017-07-26 14:00:00 
Presentation Time 30 minutes 
Registration for DC 
Paper # DC2017-17 
Volume (vol) vol.117 
Number (no) no.154 
Page pp.7-12 
#Pages 6 
Date of Issue 2017-07-19 (DC) 

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