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Paper Abstract and Keywords
Presentation 2017-08-01 13:00
[Invited Lecture] A 3.2ppm/℃ Second-Order Temperature Compensated CMOS On-Chip Oscillator Using Voltage Ratio Adjusting Technique
Guoqiang Zhang, Kosuke Yayama, Akio Katsushima, Takahiro Miki (Renesas Electronics) SDM2017-39 ICD2017-27
Abstract (in Japanese) (See Japanese page) 
(in English) A CMOS on-chip oscillator (OCO) for local interconnection network (LIN) bus is presented. The temperature dependence of the output frequency is compensated by the voltage ratio adjusting (VRA) technique. The frequency variation with supply voltage is reduced by a voltage regulator with a wide input range of 1.8V to 5.0V. The frequency shift caused by package stress is minimized by resistor placement. Over a temperature range of -40ºC to 150ºC, the measured temperature coefficients of the output frequency are 3.2ppm/ºC without the effect of the package stress and 14.2ppm/ºC with that, respectively. The measured frequency variation with supply voltage is within ±0.015%.
Keyword (in Japanese) (See Japanese page) 
(in English) Frequency variation / On-chip oscillator / Package stress / Temperature compensation / / / /  
Reference Info. IEICE Tech. Rep., vol. 117, no. 167, ICD2017-27, pp. 69-69, July 2017.
Paper # ICD2017-27 
Date of Issue 2017-07-24 (SDM, ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SDM2017-39 ICD2017-27

Conference Information
Committee SDM ICD ITE-IST  
Conference Date 2017-07-31 - 2017-08-02 
Place (in Japanese) (See Japanese page) 
Place (in English) Hokkaido-Univ. Multimedia Education Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Analog, Mixed Analog and Digital, RF, and Sensor Interface, Low voltage/low power techniques, novel devices, circuits, and applications 
Paper Information
Registration To ICD 
Conference Code 2017-07-SDM-ICD-IST 
Language English (Japanese title is available) 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A 3.2ppm/℃ Second-Order Temperature Compensated CMOS On-Chip Oscillator Using Voltage Ratio Adjusting Technique 
Sub Title (in English)  
Keyword(1) Frequency variation  
Keyword(2) On-chip oscillator  
Keyword(3) Package stress  
Keyword(4) Temperature compensation  
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1st Author's Name Guoqiang Zhang  
1st Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
2nd Author's Name Kosuke Yayama  
2nd Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
3rd Author's Name Akio Katsushima  
3rd Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
4th Author's Name Takahiro Miki  
4th Author's Affiliation Renesas Electronics Corporation (Renesas Electronics)
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Speaker Author-1 
Date Time 2017-08-01 13:00:00 
Presentation Time 25 minutes 
Registration for ICD 
Paper # SDM2017-39, ICD2017-27 
Volume (vol) vol.117 
Number (no) no.166(SDM), no.167(ICD) 
Page p.69 
#Pages 1 
Date of Issue 2017-07-24 (SDM, ICD) 

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