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Paper Abstract and Keywords
Presentation 2017-12-14 15:10
Maximum power estimator for ultra-low power energy harvesters
Hiroki Asano, Tetsuya Hirose, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa (Kobe Univ.) CAS2017-98 ICD2017-86 CPSY2017-95
Abstract (in Japanese) (See Japanese page) 
(in English) In this paper, we propose a fully integrated and area-efficient resistor-less relaxation oscillator (ROSC) for ultra-low power real-time clock (RTC) applications. The proposed ROSC is based on a conventional ROSC and modified to be area-efficient circuit configuration, without using resistors. The proposed ROSC consists of a bias current source, proportional to absolute temperature (PTAT) voltage source, current mode ROSC, shunt regulator, and output logic circuit. The PTAT voltage source and shut regulator are used to compensate for the temperature characteristics of the ROSC. By implementing our proposed ROSC, the area was 0.022 mm2. Simulated results demonstrated that our proposed ROSC in a 65-nm CMOS process generates 32.5-kHz clock frequency and achieves ultra-low power dissipation of 271 nW. The temperature and voltage dependences of the oscillation frequency were 138ppm/ºC and 13.9ppm/mV, respectively. Monte Carlo statistical simulations showed that the mean, standard deviation, and the coefficient of variation are 32.3 kHz, 0.6 kHz, and 1.9%, respectively.
Keyword (in Japanese) (See Japanese page) 
(in English) Real-time clock (RTC) / ultra-low power / resistor-less / area efficient / relaxation oscillator / PVT tolerant / /  
Reference Info. IEICE Tech. Rep., vol. 117, no. 344, ICD2017-86, pp. 141-141, Dec. 2017.
Paper # ICD2017-86 
Date of Issue 2017-12-07 (CAS, ICD, CPSY) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CAS2017-98 ICD2017-86 CPSY2017-95

Conference Information
Committee ICD CPSY CAS  
Conference Date 2017-12-14 - 2017-12-15 
Place (in Japanese) (See Japanese page) 
Place (in English) Art Hotel Ishigakijima 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To ICD 
Conference Code 2017-12-ICD-CPSY-CAS 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Maximum power estimator for ultra-low power energy harvesters 
Sub Title (in English)  
Keyword(1) Real-time clock (RTC)  
Keyword(2) ultra-low power  
Keyword(3) resistor-less  
Keyword(4) area efficient  
Keyword(5) relaxation oscillator  
Keyword(6) PVT tolerant  
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Keyword(8)  
1st Author's Name Hiroki Asano  
1st Author's Affiliation Kobe University (Kobe Univ.)
2nd Author's Name Tetsuya Hirose  
2nd Author's Affiliation Kobe University (Kobe Univ.)
3rd Author's Name Toshihiro Ozaki  
3rd Author's Affiliation Kobe University (Kobe Univ.)
4th Author's Name Nobutaka Kuroki  
4th Author's Affiliation Kobe University (Kobe Univ.)
5th Author's Name Masahiro Numa  
5th Author's Affiliation Kobe University (Kobe Univ.)
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Speaker Author-1 
Date Time 2017-12-14 15:10:00 
Presentation Time 120 minutes 
Registration for ICD 
Paper # CAS2017-98, ICD2017-86, CPSY2017-95 
Volume (vol) vol.117 
Number (no) no.343(CAS), no.344(ICD), no.345(CPSY) 
Page p.141 
#Pages 1 
Date of Issue 2017-12-07 (CAS, ICD, CPSY) 

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