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| Presentation | 2017-12-14 15:10 Noise of Digital-Based Analog Rail-to-Rail Amplifier due to Internal Path Delays Hirotoshi Suzuki, Kazuyuki Wada (Meiji Univ)  CAS2017-80 ICD2017-68 CPSY2017-77 Link to ES Tech. Rep. Archives: ICD2017-68 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Digital-Based Analog Amplifiers have been proposed for bringing the benefits by miniaturization of technology node to analog circuits.In this paper, it is revealed that delay difference between two paths of quantized inputs affects output as adding white noise and a new structure is proposed.Suppression of output noise on the proposed circuit is confirmed by simulation. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | differential circuit / logic gate / white noise / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 117, no. 343, CAS2017-80, pp. 85-89, Dec. 2017. | |
| Paper # | CAS2017-80 | |
| Date of Issue | 2017-12-07 (CAS, ICD, CPSY) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | CAS2017-80 ICD2017-68 CPSY2017-77 Link to ES Tech. Rep. Archives: ICD2017-68 |
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| Conference Information | |
| Committee | ICD CPSY CAS |
| Conference Date | 2017-12-14 - 2017-12-15 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Art Hotel Ishigakijima |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | CAS |
| Conference Code | 2017-12-ICD-CPSY-CAS |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Noise of Digital-Based Analog Rail-to-Rail Amplifier due to Internal Path Delays |
| Sub Title (in English) | |
| Keyword(1) | differential circuit |
| Keyword(2) | logic gate |
| Keyword(3) | white noise |
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| 1st Author's Name | Hirotoshi Suzuki |
| 1st Author's Affiliation | Meiji Universuty (Meiji Univ) |
| 2nd Author's Name | Kazuyuki Wada |
| 2nd Author's Affiliation | Meiji Universuty (Meiji Univ) |
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| Speaker | Author-1 |
| Date Time | 2017-12-14 15:10:00 |
| Presentation Time | 120 minutes |
| Registration for | CAS |
| Paper # | CAS2017-80, ICD2017-68, CPSY2017-77 |
| Volume (vol) | vol.117 |
| Number (no) | no.343(CAS), no.344(ICD), no.345(CPSY) |
| Page | pp.85-89 |
| #Pages | 5 |
| Date of Issue | 2017-12-07 (CAS, ICD, CPSY) |
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