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Paper Abstract and Keywords
Presentation 2018-02-28 16:55
Reliability Evaluation of Mixed Error Correction Scheme for Soft-Error Tolerant Datapaths
Junghoon Oh, Mineo Kaneko (JAIST) VLD2017-102
Abstract (in Japanese) (See Japanese page) 
(in English) Among several problems with miniaturization of LSIs, soft-errors are one of serious problems to make reliability worse. As the distance among wires and components becomes smaller, susceptibility of LSI to soft-errors becomes higher. Hence, the possibility that a single soft-error affects several components at the same time becomes higher. To date, comparison-retry or majority-voting scheme is commonly used for error correction in the system level. However, when several components output corrupt data due to a single soft-error, it can make voters neutralized. The concept of adjacency constraint (AC) among components has been proposed in our preliminary study, where the temporal and the spatial ranges of a soft-error are considered simultaneously, and a system error is prevented by appropriately managing temporal and/or spatial distance of operations. Applying AC allows us to realize multi-component soft-error tolerance in the majority-voting scheme. In addition, a mixed error correction method is proposed to take advantages of two distinct error correction schemes. This paper discusses the effectiveness of those proposed methods by evaluating reliability against multiple component soft-errors.
Keyword (in Japanese) (See Japanese page) 
(in English) Fault Injection Test / Soft-Error Tolerance / Component Adjacency Constraint (AC) / Mixed Error Correction Scheme / High-Level Synthesis / Triple Algorithm Redundancy / /  
Reference Info. IEICE Tech. Rep., vol. 117, no. 455, VLD2017-102, pp. 79-84, Feb. 2018.
Paper # VLD2017-102 
Date of Issue 2018-02-21 (VLD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
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reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2017-102

Conference Information
Committee VLD HWS  
Conference Date 2018-02-28 - 2018-03-02 
Place (in Japanese) (See Japanese page) 
Place (in English) Okinawa Seinen Kaikan 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To VLD 
Conference Code 2018-02-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Reliability Evaluation of Mixed Error Correction Scheme for Soft-Error Tolerant Datapaths 
Sub Title (in English)  
Keyword(1) Fault Injection Test  
Keyword(2) Soft-Error Tolerance  
Keyword(3) Component Adjacency Constraint (AC)  
Keyword(4) Mixed Error Correction Scheme  
Keyword(5) High-Level Synthesis  
Keyword(6) Triple Algorithm Redundancy  
Keyword(7)  
Keyword(8)  
1st Author's Name Junghoon Oh  
1st Author's Affiliation Japan Advanced Institute Science and Technology (JAIST)
2nd Author's Name Mineo Kaneko  
2nd Author's Affiliation Japan Advanced Institute Science and Technology (JAIST)
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Speaker Author-1 
Date Time 2018-02-28 16:55:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2017-102 
Volume (vol) vol.117 
Number (no) no.455 
Page pp.79-84 
#Pages 6 
Date of Issue 2018-02-21 (VLD) 

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