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Paper Abstract and Keywords
Presentation 2018-03-02 15:10
Study on Speed Up of FDTD Analysis using in Parallel Computer
Kazuki Kurihara, Takashi Kasuga (NIT, Nagano) EMD2017-64
Abstract (in Japanese) (See Japanese page) 
(in English) To process the high-speed for the big data, the signal frequency driven on the printed circuit board (PCB) is GHz band. When the signal frequency is higher, noise problem such as the noise radiation and crosstalk between lines is expanded. The electromagnetic simulator is used at the PCB design, and the results of the simulation is reflected to the PCB design. The purpose of this study is the develop of the electromagnetic noise simulator by the Finite Difference Time Domain (FDTD) method implemented in PCB design software. To make the software that not to be influence by the computer specification and the kind of operation system, the FDTD simulator implemented in the MATLAB is draw up. And processing speed of simulator is make higher. As the vector processing is applied the electric and magnetic calculation, the calculation time can be decreased by 90 %. The distributed processing is applied to the large scale arrays. The high-speed processing can be done at simple array. In the FDTD simulation, the processing time is increased. The high-speed processing of the free space calculation of FDTD simulation can be done. However, the calculation time on the absorbing boundary condition process is increased as the overhead.
Keyword (in Japanese) (See Japanese page) 
(in English) FDTD analysis / printed circuit board, / MATLAB / vector processing / distributed processing / / /  
Reference Info. IEICE Tech. Rep., vol. 117, no. 467, EMD2017-64, pp. 31-35, March 2018.
Paper # EMD2017-64 
Date of Issue 2018-02-23 (EMD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee EMD  
Conference Date 2018-03-02 - 2018-03-02 
Place (in Japanese) (See Japanese page) 
Place (in English) Nippon Institute of Technology 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To EMD 
Conference Code 2018-03-EMD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Study on Speed Up of FDTD Analysis using in Parallel Computer 
Sub Title (in English)  
Keyword(1) FDTD analysis  
Keyword(2) printed circuit board,  
Keyword(3) MATLAB  
Keyword(4) vector processing  
Keyword(5) distributed processing  
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1st Author's Name Kazuki Kurihara  
1st Author's Affiliation National Institute Technology, Nagano College (NIT, Nagano)
2nd Author's Name Takashi Kasuga  
2nd Author's Affiliation National Institute Technology, Nagano College (NIT, Nagano)
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Speaker Author-1 
Date Time 2018-03-02 15:10:00 
Presentation Time 15 minutes 
Registration for EMD 
Paper # EMD2017-64 
Volume (vol) vol.117 
Number (no) no.467 
Page pp.31-35 
#Pages 5 
Date of Issue 2018-02-23 (EMD) 

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