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Paper Abstract and Keywords
Presentation 2018-03-02 09:00
On-chip and ultra low current measurement circuit based on potentiostat method
Daishi Isogai, Takaaki Shirakawa, Shigetoshi Nakatake (Univ. of Kitakyushu) VLD2017-119
Abstract (in Japanese) (See Japanese page) 
(in English) We propose a current measurement circuit using on - chip high resistance by MOSFET. Due to advances in biosensing technology and implant sensing technology, the diversification of the sensor front end has progressed and the demand for high performance against weak current detection has been increasing. In this research, using the proposed resistor, we operate a current measuring circuit used in potentiostat even among electrochemical measurements. The circuit is actually designed, and the result of the SPICE simulation is compared with the proposed resistor with the conventional Poly resistance to verify the possibility of 1 chip.
Keyword (in Japanese) (See Japanese page) 
(in English) Potentiostat / High resistance / Subthreshold / I-V converter / / / /  
Reference Info. IEICE Tech. Rep., vol. 117, no. 455, VLD2017-119, pp. 181-186, Feb. 2018.
Paper # VLD2017-119 
Date of Issue 2018-02-21 (VLD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2017-119

Conference Information
Committee VLD HWS  
Conference Date 2018-02-28 - 2018-03-02 
Place (in Japanese) (See Japanese page) 
Place (in English) Okinawa Seinen Kaikan 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To VLD 
Conference Code 2018-02-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) On-chip and ultra low current measurement circuit based on potentiostat method 
Sub Title (in English)  
Keyword(1) Potentiostat  
Keyword(2) High resistance  
Keyword(3) Subthreshold  
Keyword(4) I-V converter  
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1st Author's Name Daishi Isogai  
1st Author's Affiliation The University of Kitakyushu (Univ. of Kitakyushu)
2nd Author's Name Takaaki Shirakawa  
2nd Author's Affiliation The University of Kitakyushu (Univ. of Kitakyushu)
3rd Author's Name Shigetoshi Nakatake  
3rd Author's Affiliation The University of Kitakyushu (Univ. of Kitakyushu)
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Speaker Author-1 
Date Time 2018-03-02 09:00:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2017-119 
Volume (vol) vol.117 
Number (no) no.455 
Page pp.181-186 
#Pages 6 
Date of Issue 2018-02-21 (VLD) 

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