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Paper Abstract and Keywords
Presentation 2018-07-31 10:00
Low-Latency Stream Data Join on Multiple FPGA Nodes
Koushi Matsushita, Celimuge WU, Tsutomu Yoshinaga (UEC) CPSY2018-17
Abstract (in Japanese) (See Japanese page) 
(in English) This paper proposes an implementation of low-latency stream data join processing for multiple FPGA nodes.
We reported implementations of Low-Latency Handshake Join on a single FPGA and a multi-node version of Handshake Join, each other, in the past.
However, the former is not easy to extend for multi-node execution because of its complicated data management across the nodes.
Therefore, we modified the original Low-Latency Handshake Join algorithm so as to eliminate complicated status management of tuple data across the nodes to be easily extendable for multi-node execution.
Based on our experiment, we show that the proposed implementation achieves a comparable latency on a single node, as well as scalable performance gain on multiple nodes.
Keyword (in Japanese) (See Japanese page) 
(in English) FPGA / join operation / stream data processing / Handshake Join / Low-Latency Handshake Join / multiple nodes / /  
Reference Info. IEICE Tech. Rep., vol. 118, no. 165, CPSY2018-17, pp. 71-76, July 2018.
Paper # CPSY2018-17 
Date of Issue 2018-07-23 (CPSY) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPSY2018-17

Conference Information
Committee CPSY DC IPSJ-ARC  
Conference Date 2018-07-30 - 2018-08-01 
Place (in Japanese) (See Japanese page) 
Place (in English) Kumamoto City International Center 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Parallel, Distributed and Cooperative Processing Systems and Dependable Computing 
Paper Information
Registration To CPSY 
Conference Code 2018-07-CPSY-DC-ARC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Low-Latency Stream Data Join on Multiple FPGA Nodes 
Sub Title (in English)  
Keyword(1) FPGA  
Keyword(2) join operation  
Keyword(3) stream data processing  
Keyword(4) Handshake Join  
Keyword(5) Low-Latency Handshake Join  
Keyword(6) multiple nodes  
Keyword(7)  
Keyword(8)  
1st Author's Name Koushi Matsushita  
1st Author's Affiliation The University of Electro-Communications (UEC)
2nd Author's Name Celimuge WU  
2nd Author's Affiliation The University of Electro-Communications (UEC)
3rd Author's Name Tsutomu Yoshinaga  
3rd Author's Affiliation The University of Electro-Communications (UEC)
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Speaker Author-1 
Date Time 2018-07-31 10:00:00 
Presentation Time 30 minutes 
Registration for CPSY 
Paper # CPSY2018-17 
Volume (vol) vol.118 
Number (no) no.165 
Page pp.71-76 
#Pages 6 
Date of Issue 2018-07-23 (CPSY) 

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