IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2019-01-18 14:05
Study on Far-End Cross Talk reduction technology in Microstrip-line -- Attached Capacitor Value --
Yoshiaki Mori, Sinichi Sasaki (Saga Univ) EMCJ2018-105
Abstract (in Japanese) (See Japanese page) 
(in English) In this laboratory to be studying to add Capacitance between Signal-Lines on Microstrip-Line for the purpose of reducing Far-End-Crosstalk (FEXT). In that case, it was a slight difference between the calculated capacitance value obtained from the signal line constant and the optimum capacitance value obtained from the waveform analysis. In this report, it was while examining factors of difference and to be changed the signal line structure etc. As a result of examination, it was clarified that the difference is decided by the capacity to be added regardless of the line structure for the difference between the calculated capacity value and the optimum capacity value in the case of adding one capacitor parts to signal line length center.
Keyword (in Japanese) (See Japanese page) 
(in English) Far-end-CrossTalk(FEXT) / The calculated capacitance value / The optimum capacitance value / / / / /  
Reference Info. IEICE Tech. Rep., vol. 118, no. 406, EMCJ2018-105, pp. 29-34, Jan. 2019.
Paper # EMCJ2018-105 
Date of Issue 2019-01-11 (EMCJ) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF EMCJ2018-105

Conference Information
Committee EMCJ  
Conference Date 2019-01-18 - 2019-01-18 
Place (in Japanese) (See Japanese page) 
Place (in English) Osaka University 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To EMCJ 
Conference Code 2019-01-EMCJ 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Study on Far-End Cross Talk reduction technology in Microstrip-line 
Sub Title (in English) Attached Capacitor Value 
Keyword(1) Far-end-CrossTalk(FEXT)  
Keyword(2) The calculated capacitance value  
Keyword(3) The optimum capacitance value  
Keyword(4)  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Yoshiaki Mori  
1st Author's Affiliation Saga University (Saga Univ)
2nd Author's Name Sinichi Sasaki  
2nd Author's Affiliation Saga University (Saga Univ)
3rd Author's Name  
3rd Author's Affiliation ()
4th Author's Name  
4th Author's Affiliation ()
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Speaker Author-1 
Date Time 2019-01-18 14:05:00 
Presentation Time 25 minutes 
Registration for EMCJ 
Paper # EMCJ2018-105 
Volume (vol) vol.118 
Number (no) no.406 
Page pp.29-34 
#Pages
Date of Issue 2019-01-11 (EMCJ) 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan