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Paper Abstract and Keywords
Presentation 2019-05-16 11:00
A Design of Peak Current Detector Considering Processing and Wiring Delay
Yudai Furukawa (Fukuoka Univ.), Kazuya Uetsuhara, Yuichiro Shibata (Nagasaki Univ.), Tadashi Suetsugu (Fukuoka Univ.), Fujio Kurokawa (NiAS) EE2019-4
Abstract (in Japanese) (See Japanese page) 
(in English) The current mode control is used to realize high stability and quick response as the control method for dc-dc converters. Especially, the peak current mode control performs such properties. In the digital control switching power supply, it is important to implement the peak current mode control reducing a bad influence of delay time included in the controller. The purpose of this paper is to discuss the design of peak current mode control with current – frequency conversion considering the processing and wiring delay, which is the cause of an incorrect action, in the Field Programmable Gate Array (FPGA). As a result, it is revealed that the timing adjustment of processed signals in FPGA brings a proper operation.
Keyword (in Japanese) (See Japanese page) 
(in English) Peak Current Mode Control / Current to Frequency Conversion / / / / / /  
Reference Info. IEICE Tech. Rep., vol. 119, no. 32, EE2019-4, pp. 17-21, May 2019.
Paper # EE2019-4 
Date of Issue 2019-05-09 (EE) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF EE2019-4

Conference Information
Committee EE IEE-HCA  
Conference Date 2019-05-16 - 2019-05-17 
Place (in Japanese) (See Japanese page) 
Place (in English) Kikai-Shinko-Kaikan Bldg. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Switching power supply, New industrial and home appliance for power, others 
Paper Information
Registration To EE 
Conference Code 2019-05-EE-HCA 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Design of Peak Current Detector Considering Processing and Wiring Delay 
Sub Title (in English)  
Keyword(1) Peak Current Mode Control  
Keyword(2) Current to Frequency Conversion  
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1st Author's Name Yudai Furukawa  
1st Author's Affiliation Fukuoka University (Fukuoka Univ.)
2nd Author's Name Kazuya Uetsuhara  
2nd Author's Affiliation Nagasaki University (Nagasaki Univ.)
3rd Author's Name Yuichiro Shibata  
3rd Author's Affiliation Nagasaki University (Nagasaki Univ.)
4th Author's Name Tadashi Suetsugu  
4th Author's Affiliation Fukuoka University (Fukuoka Univ.)
5th Author's Name Fujio Kurokawa  
5th Author's Affiliation Nagasaki Insutitute of Applied Science (NiAS)
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Speaker Author-1 
Date Time 2019-05-16 11:00:00 
Presentation Time 30 minutes 
Registration for EE 
Paper # EE2019-4 
Volume (vol) vol.119 
Number (no) no.32 
Page pp.17-21 
#Pages 5 
Date of Issue 2019-05-09 (EE) 

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