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Paper Abstract and Keywords
Presentation 2019-08-09 14:10
Effect of Vsub and Positive Charge in Buried Oxide on Super Steep SS “PN Body-Tied SOI-FET”
Wataru Yabuki, Jiro Ida, Takayuki Mori (KIT), Koichiro Ishibashi (UEC), Yasuo Arai (KEK) SDM2019-51 ICD2019-16
Abstract (in Japanese) (See Japanese page) 
(in English) In this study, We report the effect of the substrate bias (Vsub) and the positive charge (Qox) in the buried oxide (BOX) on super steep subthreshold slope (SS) “PN Body-Tied (PNBT) SOI-FET” proposed in our laboratory. The Qox in the BOX was evaluated with the specific test device. Removing the effect of the Qox and realizing the super steep SS, the necessity of Vsub, especially on P-channel, was systematically confirmed with measurements and simulations. It was founded out that the positive feedback by PNBT contributes to making the barrier height for reducing the leakage current and realizing the super steep SS, although the difference of the static barrier height is small only with Vsub and the Qox. We also propose modification on PNBT structure for realizing CMOS without Vsub bias.
Keyword (in Japanese) (See Japanese page) 
(in English) SOI-FET / Steep Subthreshold Slope / Oxide Charge / / / / /  
Reference Info. IEICE Tech. Rep., vol. 119, no. 161, SDM2019-51, pp. 89-93, Aug. 2019.
Paper # SDM2019-51 
Date of Issue 2019-07-31 (SDM, ICD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee SDM ICD ITE-IST  
Conference Date 2019-08-07 - 2019-08-09 
Place (in Japanese) (See Japanese page) 
Place (in English) Hokkaido Univ., Graduate School /Faculty of Information Science and 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Analog, Mixed Analog and Digital, RF, and Sensor Interface, Low Voltage/Low Power Techniques, Novel Devices/Circuits, and the Applications 
Paper Information
Registration To SDM 
Conference Code 2019-08-SDM-ICD-IST 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Effect of Vsub and Positive Charge in Buried Oxide on Super Steep SS “PN Body-Tied SOI-FET” 
Sub Title (in English)  
Keyword(1) SOI-FET  
Keyword(2) Steep Subthreshold Slope  
Keyword(3) Oxide Charge  
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1st Author's Name Wataru Yabuki  
1st Author's Affiliation Kanazawa Institute of Technology (KIT)
2nd Author's Name Jiro Ida  
2nd Author's Affiliation Kanazawa Institute of Technology (KIT)
3rd Author's Name Takayuki Mori  
3rd Author's Affiliation Kanazawa Institute of Technology (KIT)
4th Author's Name Koichiro Ishibashi  
4th Author's Affiliation University of Electro-Communications (UEC)
5th Author's Name Yasuo Arai  
5th Author's Affiliation High Energy Accelerator Research Organization (KEK)
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Speaker Author-1 
Date Time 2019-08-09 14:10:00 
Presentation Time 25 minutes 
Registration for SDM 
Paper # SDM2019-51, ICD2019-16 
Volume (vol) vol.119 
Number (no) no.161(SDM), no.162(ICD) 
Page pp.89-93 
#Pages 5 
Date of Issue 2019-07-31 (SDM, ICD) 

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