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Paper Abstract and Keywords
Presentation 2019-12-20 16:30
Aging Observation using On-Chip Delay Measurement in Long-term Reliability Test
Yousuke Miyake, Takaaki Kato, Seiji Kajihara (Kyutech), Masao Aso, Haruji Futami, Satoshi Matsunaga (Syswave), Yukiya Miura (TMU) DC2019-85
Abstract (in Japanese) (See Japanese page) 
(in English) Avoidance of delay-related faults due to aging phenomena is an important issue of VLSI systems. Periodical delay measurement in-field is useful for not only fault detection but also fault prediction for such faults. An on-chip delay measurement method based on BIST (Built-In Self-Test) with variable test clock generation has been proposed. In this work experiments using a test chip of the delay measurement circuit was done for observing aging phenomenon in long-term reliability test. Aging is accelerated by exposing the chip to high stress condition such as high temperature and high voltage. The effectiveness of degradation detection using the on-chip delay measurement circuit is discussed by evaluation with long-term reliability test.
Keyword (in Japanese) (See Japanese page) 
(in English) Field test / Logic BIST / Delay measurement / Degradation detection / Long-term reliability test / / /  
Reference Info. IEICE Tech. Rep., vol. 119, no. 351, DC2019-85, pp. 37-42, Dec. 2019.
Paper # DC2019-85 
Date of Issue 2019-12-13 (DC) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee DC  
Conference Date 2019-12-20 - 2019-12-20 
Place (in Japanese) (See Japanese page) 
Place (in English)  
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Paper Information
Registration To DC 
Conference Code 2019-12-DC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Aging Observation using On-Chip Delay Measurement in Long-term Reliability Test 
Sub Title (in English)  
Keyword(1) Field test  
Keyword(2) Logic BIST  
Keyword(3) Delay measurement  
Keyword(4) Degradation detection  
Keyword(5) Long-term reliability test  
1st Author's Name Yousuke Miyake  
1st Author's Affiliation Kyushu Institute of Technology (Kyutech)
2nd Author's Name Takaaki Kato  
2nd Author's Affiliation Kyushu Institute of Technology (Kyutech)
3rd Author's Name Seiji Kajihara  
3rd Author's Affiliation Kyushu Institute of Technology (Kyutech)
4th Author's Name Masao Aso  
4th Author's Affiliation Syswave Corp. (Syswave)
5th Author's Name Haruji Futami  
5th Author's Affiliation Syswave Corp. (Syswave)
6th Author's Name Satoshi Matsunaga  
6th Author's Affiliation Syswave Corp. (Syswave)
7th Author's Name Yukiya Miura  
7th Author's Affiliation Tokyo Metropolitan University (TMU)
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Speaker Author-1 
Date Time 2019-12-20 16:30:00 
Presentation Time 25 minutes 
Registration for DC 
Paper # DC2019-85 
Volume (vol) vol.119 
Number (no) no.351 
Page pp.37-42 
Date of Issue 2019-12-13 (DC) 

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