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| Presentation | 2020-01-22 16:55 A Comparison of Filter for Convolutional Neural Network towards Hardware Implementation Kosuke Akimoto, Youki Sada, Shimpei Sato, Hiroki Hakahara (Tokyo Tech)  VLD2019-64 CPSY2019-62 RECONF2019-54 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Convolutional neural networks have high recognition accuracy in computer vision task, and many of the learned filters are known to be similar to gabor filters. For the purpose of constructing a model that is robust to the orientation and scale of the input image, a method that uses a gabor filter for convolution processing has already been proposed. Also, a channel shift appoximation has been proposed. In this paper, we compare a light-weight convolution toward a dedicated CNN accelerator. This paper proposes a design method for FPGAs that performs computations with lower power consumption and lower latency than GPUs for device applications. Since we reuse the batch normalization circuit, there is no computational resource overhead for convolution operations using Gabor filters. We implement the proposed CNN on ZCU104 evaluation board by using Xilinx SDSoC 2018.2.2 and CamVid dataset. The experimental results show that there is no increase of FPGA area with 1.3 point better accuracy (mIoU) compared to a conventional MobileNet. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Convolutional Neural Network / Gabor Filter / MobileNet / ShiftNet / FPGA / Semantic Segmentation / / | |
| Reference Info. | IEICE Tech. Rep., vol. 119, no. 373, RECONF2019-54, pp. 61-66, Jan. 2020. | |
| Paper # | RECONF2019-54 | |
| Date of Issue | 2020-01-15 (VLD, CPSY, RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2019-64 CPSY2019-62 RECONF2019-54 |
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| Conference Information | |
| Committee | IPSJ-SLDM RECONF VLD CPSY IPSJ-ARC |
| Conference Date | 2020-01-22 - 2020-01-24 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Raiosha, Hiyoshi Campus, Keio University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc. |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2020-01-SLDM-RECONF-VLD-CPSY-ARC |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Comparison of Filter for Convolutional Neural Network towards Hardware Implementation |
| Sub Title (in English) | |
| Keyword(1) | Convolutional Neural Network |
| Keyword(2) | Gabor Filter |
| Keyword(3) | MobileNet |
| Keyword(4) | ShiftNet |
| Keyword(5) | FPGA |
| Keyword(6) | Semantic Segmentation |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Kosuke Akimoto |
| 1st Author's Affiliation | Tokyo Institute of Technology (Tokyo Tech) |
| 2nd Author's Name | Youki Sada |
| 2nd Author's Affiliation | Tokyo Institute of Technology (Tokyo Tech) |
| 3rd Author's Name | Shimpei Sato |
| 3rd Author's Affiliation | Tokyo Institute of Technology (Tokyo Tech) |
| 4th Author's Name | Hiroki Hakahara |
| 4th Author's Affiliation | Tokyo Institute of Technology (Tokyo Tech) |
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| Speaker | Author-1 |
| Date Time | 2020-01-22 16:55:00 |
| Presentation Time | 25 minutes |
| Registration for | RECONF |
| Paper # | VLD2019-64, CPSY2019-62, RECONF2019-54 |
| Volume (vol) | vol.119 |
| Number (no) | no.371(VLD), no.372(CPSY), no.373(RECONF) |
| Page | pp.61-66 |
| #Pages | 6 |
| Date of Issue | 2020-01-15 (VLD, CPSY, RECONF) |
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