Paper Abstract and Keywords |
Presentation |
2020-01-24 16:10
26-bit 400-neuron 0.3-ksps FORCE Learning FPGA Core for Reservoir Computing koyo Minamikawa, Shunya Suzuki, Megumi Akai-Kasaya, Tetsuya asai (Hokkaido Univ.) NLP2019-98 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Reservoir Computing (RC) is a type of Recurrent Neural Network (RNN) and are used for processing time series.
Since the learning part is only the weight of the output layer and the amount of calculation is smaller than that of the RNN, the reservoir computing is expected to learn with low power.
Inverse matrix is required to learn in an RC, and numerous resources are required to implement the hardware.
However, by using FORCE learning [1], calculations can be performed only with matrix operation without using inverse matrix operation.
In this study, we implement a dedicated architecture for learning reservoir computing that drives with low power consumption using FORCE learning with FPGA.
We designed the architecture to operate on the cheapest possible FPGA.
The board was actually created and evaluated from the viewpoint of accuracy and power consumption. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Neural Network / Reservoir Computing / FPGA / Power saving / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 119, no. 381, NLP2019-98, pp. 67-72, Jan. 2020. |
Paper # |
NLP2019-98 |
Date of Issue |
2020-01-16 (NLP) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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NLP2019-98 |
Conference Information |
Committee |
NLP NC |
Conference Date |
2020-01-23 - 2020-01-25 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Miyakojima Marine Terminal |
Topics (in Japanese) |
(See Japanese page) |
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Paper Information |
Registration To |
NLP |
Conference Code |
2020-01-NLP-NC |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
26-bit 400-neuron 0.3-ksps FORCE Learning FPGA Core for Reservoir Computing |
Sub Title (in English) |
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Keyword(1) |
Neural Network |
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Reservoir Computing |
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FPGA |
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Power saving |
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1st Author's Name |
koyo Minamikawa |
1st Author's Affiliation |
Hokkaido University (Hokkaido Univ.) |
2nd Author's Name |
Shunya Suzuki |
2nd Author's Affiliation |
Hokkaido University (Hokkaido Univ.) |
3rd Author's Name |
Megumi Akai-Kasaya |
3rd Author's Affiliation |
Hokkaido University (Hokkaido Univ.) |
4th Author's Name |
Tetsuya asai |
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Hokkaido University (Hokkaido Univ.) |
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Speaker |
Author-1 |
Date Time |
2020-01-24 16:10:00 |
Presentation Time |
20 minutes |
Registration for |
NLP |
Paper # |
NLP2019-98 |
Volume (vol) |
vol.119 |
Number (no) |
no.381 |
Page |
pp.67-72 |
#Pages |
6 |
Date of Issue |
2020-01-16 (NLP) |
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