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Paper Abstract and Keywords
Presentation 2020-11-17 09:30
Design of Nonvolatile SRAM Using SONOS Flash Cell and its Evaluation by Circuit Simulation
Takaki Urabe, Koji Nii, Kazutoshi Kobayashi (KIT) VLD2020-11 ICD2020-31 DC2020-31 RECONF2020-30
Abstract (in Japanese) (See Japanese page) 
(in English) In this paper, we designed a layout of a nonvolatile SRAM memory using the SONOS Flash memory, and investigated its characteristics. As a result of circuit simulations, the area of NV-SRAM increases by 47% compared to SRAM, but the operating speed increases by less than 1%. Because NV-SRAM can be turned off during standby, so the power consumption
can be reduced if the standby time is 15% or more of the operating time.
Keyword (in Japanese) (See Japanese page) 
(in English) SRAM / Circuit Symulation / Nonvolatile memory / Break Even Time / / / /  
Reference Info. IEICE Tech. Rep., vol. 120, no. 235, ICD2020-31, pp. 1-5, Nov. 2020.
Paper # ICD2020-31 
Date of Issue 2020-11-10 (VLD, ICD, DC, RECONF) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2020-11 ICD2020-31 DC2020-31 RECONF2020-30

Conference Information
Committee VLD DC RECONF ICD IPSJ-SLDM  
Conference Date 2020-11-17 - 2020-11-18 
Place (in Japanese) (See Japanese page) 
Place (in English) Online 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2020 -New Field of VLSI Design- 
Paper Information
Registration To ICD 
Conference Code 2020-11-VLD-DC-RECONF-ICD-SLDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Design of Nonvolatile SRAM Using SONOS Flash Cell and its Evaluation by Circuit Simulation 
Sub Title (in English)  
Keyword(1) SRAM  
Keyword(2) Circuit Symulation  
Keyword(3) Nonvolatile memory  
Keyword(4) Break Even Time  
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Keyword(6)  
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1st Author's Name Takaki Urabe  
1st Author's Affiliation Kyoto Institute of Technology (KIT)
2nd Author's Name Koji Nii  
2nd Author's Affiliation Kyoto Institute of Technology (KIT)
3rd Author's Name Kazutoshi Kobayashi  
3rd Author's Affiliation Kyoto Institute of Technology (KIT)
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Speaker Author-1 
Date Time 2020-11-17 09:30:00 
Presentation Time 25 minutes 
Registration for ICD 
Paper # VLD2020-11, ICD2020-31, DC2020-31, RECONF2020-30 
Volume (vol) vol.120 
Number (no) no.234(VLD), no.235(ICD), no.236(DC), no.237(RECONF) 
Page pp.1-5 
#Pages 5 
Date of Issue 2020-11-10 (VLD, ICD, DC, RECONF) 

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