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Paper Abstract and Keywords
Presentation 2021-03-03 14:55
Aggregating Service Functions in Full Hardware Implementation of RTOS-Based Systems
Iori Muguruma, Nagisa Ishiura, Takuya Ando (Kwansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroyuki Kanbara (ASTEM RI/KYOTO) VLD2020-75 HWS2020-50
Abstract (in Japanese) (See Japanese page) 
(in English) This article presents a revised architecture for full-hardware
implementation of RTOS-based systems. In the previous method by
Oosako, where tasks and handlers along with kernel functions were all
synthesized into a single hardware, multiple copies of the same
hardware modules were generated because the bodies of the same service
functions were linked with tasks and were synthesized into hardware.
Our new architecture attempts to remove such duplication by migrating
the bodies of the service functions from task modules to the manager
module. For this purpose, a new mechanism for activating service
functions from tasks and arbitrating multiple requests is proposed.
This scheme enables design of service modules in RT level, which
contributes to reduce execution time of the service functions. An
experimental hardware design of ``sample1'' bundled with TOPPERS/ASP3
kernel shows that only small reduction in circuit size is achieved on
this instance but the execution time is reduced by more than 50 % for
most of the service functions.
Keyword (in Japanese) (See Japanese page) 
(in English) Real-Time Systems / RTOS / System Synthesis / Hardware Accelerator / TOPPERS/ASP3 / High-Level Synthesis / /  
Reference Info. IEICE Tech. Rep., vol. 120, no. 400, VLD2020-75, pp. 38-43, March 2021.
Paper # VLD2020-75 
Date of Issue 2021-02-24 (VLD, HWS) 
ISSN Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2020-75 HWS2020-50

Conference Information
Committee HWS VLD  
Conference Date 2021-03-03 - 2021-03-04 
Place (in Japanese) (See Japanese page) 
Place (in English) Online 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Technology for System-on-Silicon, Hardware Security, etc. 
Paper Information
Registration To VLD 
Conference Code 2021-03-HWS-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Aggregating Service Functions in Full Hardware Implementation of RTOS-Based Systems 
Sub Title (in English)  
Keyword(1) Real-Time Systems  
Keyword(2) RTOS  
Keyword(3) System Synthesis  
Keyword(4) Hardware Accelerator  
Keyword(5) TOPPERS/ASP3  
Keyword(6) High-Level Synthesis  
1st Author's Name Iori Muguruma  
1st Author's Affiliation Kwansei Gakuin University (Kwansei Gakuin Univ.)
2nd Author's Name Nagisa Ishiura  
2nd Author's Affiliation Kwansei Gakuin University (Kwansei Gakuin Univ.)
3rd Author's Name Takuya Ando  
3rd Author's Affiliation Kwansei Gakuin University (Kwansei Gakuin Univ.)
4th Author's Name Hiroyuki Tomiyama  
4th Author's Affiliation Ritsumeikan University (Ritsumeikan Univ.)
5th Author's Name Hiroyuki Kanbara  
5th Author's Affiliation Advanced Science, Technology & Management Research Institute of KYOTO (ASTEM RI/KYOTO)
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Speaker Author-1 
Date Time 2021-03-03 14:55:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2020-75, HWS2020-50 
Volume (vol) vol.120 
Number (no) no.400(VLD), no.401(HWS) 
Page pp.38-43 
Date of Issue 2021-02-24 (VLD, HWS) 

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