| IEICE Technical Committee Submission System Conference Paper's Information |
Online Proceedings [Sign in] Tech. Rep. Archives |
| Go Top Page | Go Previous | [Japanese] / [English] |
| Paper Abstract and Keywords | ||
| Presentation | 2021-03-03 11:15 The Design and Development of of Quantized Neural Networks Library for Exact Hardware Emulation Masato Kiyama, Yasuhiro Nakahara, Motoki Amagasaki, Masahiro Iida (Kumamoto Univ.)  VLD2020-70 HWS2020-45 |
|
| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Quantization is used to speed up execution time and save power when runnning Deep neural networks (DNNs) on edge devices or AI chips. To investigate the effect of quantization, we need performing inference after quantizing the weights of DNN with 32-bit floating-point numbers by a some bit width, and then quantizing them back to 32-bit floating-point numbers. This is because the DNN library can only handle floating-point numbers. However, the accuracy of the emulation does not provide accurate precision. We need accurate precision to detect overflow in MAC operations or to verify the operation on AI chips. We have developed PyParch, a DNN library that executes quantized DNNs (QNNs) with exactly the same behavior as hardware. In this paper, we describe a new proposal and implementation of PyParch. As a result of the evaluation, the accuracy of QNNs with arbitrary bit widths can be estimated for large and complex DNNs such as YOLOv5, and the overflow can be detected. We evaluated the overhead of the emulation time and found that it was 5.6 times slower for QNN and 42 times slower for QNN with overflow detection compared to the normal DNN execution time. |
|
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Deep Learning / Quantization / / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 120, no. 400, VLD2020-70, pp. 18-23, March 2021. | |
| Paper # | VLD2020-70 | |
| Date of Issue | 2021-02-24 (VLD, HWS) | |
| ISSN | Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2020-70 HWS2020-45 |
|
| Conference Information | |
| Committee | HWS VLD |
| Conference Date | 2021-03-03 - 2021-03-04 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Technology for System-on-Silicon, Hardware Security, etc. |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2021-03-HWS-VLD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | The Design and Development of of Quantized Neural Networks Library for Exact Hardware Emulation |
| Sub Title (in English) | |
| Keyword(1) | Deep Learning |
| Keyword(2) | Quantization |
| Keyword(3) | |
| Keyword(4) | |
| Keyword(5) | |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Masato Kiyama |
| 1st Author's Affiliation | Faculty of Advanced Science and Technology, Kumamoto University (Kumamoto Univ.) |
| 2nd Author's Name | Yasuhiro Nakahara |
| 2nd Author's Affiliation | Graduate School of Science and Technology, Kumamoto University (Kumamoto Univ.) |
| 3rd Author's Name | Motoki Amagasaki |
| 3rd Author's Affiliation | Faculty of Advanced Science and Technology, Kumamoto University (Kumamoto Univ.) |
| 4th Author's Name | Masahiro Iida |
| 4th Author's Affiliation | Faculty of Advanced Science and Technology, Kumamoto University (Kumamoto Univ.) |
| 5th Author's Name | |
| 5th Author's Affiliation | () |
| 6th Author's Name | |
| 6th Author's Affiliation | () |
| 7th Author's Name | |
| 7th Author's Affiliation | () |
| 8th Author's Name | |
| 8th Author's Affiliation | () |
| 9th Author's Name | |
| 9th Author's Affiliation | () |
| 10th Author's Name | |
| 10th Author's Affiliation | () |
| 11th Author's Name | |
| 11th Author's Affiliation | () |
| 12th Author's Name | |
| 12th Author's Affiliation | () |
| 13th Author's Name | |
| 13th Author's Affiliation | () |
| 14th Author's Name | |
| 14th Author's Affiliation | () |
| 15th Author's Name | |
| 15th Author's Affiliation | () |
| 16th Author's Name | |
| 16th Author's Affiliation | () |
| 17th Author's Name | |
| 17th Author's Affiliation | () |
| 18th Author's Name | |
| 18th Author's Affiliation | () |
| Speaker | Author-1 |
| Date Time | 2021-03-03 11:15:00 |
| Presentation Time | 25 minutes |
| Registration for | VLD |
| Paper # | VLD2020-70, HWS2020-45 |
| Volume (vol) | vol.120 |
| Number (no) | no.400(VLD), no.401(HWS) |
| Page | pp.18-23 |
| #Pages | 6 |
| Date of Issue | 2021-02-24 (VLD, HWS) |
[Return to Top Page]