IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2021-03-26 10:40
Unsupervised Recycled FPGA Detection Using Direct Density Ratio Estimation Based on Self-referencing
Yuya Isaka (KGU), Michihiro Shintani (NAIST), Foisal Ahmed (PU), Michiko Inoue (NAIST) CPSY2020-60 DC2020-90
Abstract (in Japanese) (See Japanese page) 
(in English) It is well known that the performance of field-programmable gate-array (FPGA) degrades over time due to their usage. Several methods have been proposed in which the frequency of a ring oscillator (Ring oscillator, RO) designed on an FPGA is analyzed and whether it is recycled or not is determined by machine learning model. However, most of the existing methods require a large amount of fresh FPGAs as correct data for machine learning, which poses a problem in actual application to industrial. In this paper, we propose a novel unsupervised recycled FPGA detection method. In the proposed method, multi-stage ROs in all logical blocks are designed on the FPGA, and adjacent ROs are compared to reduce the effects of manufacturing process variation and highlight the effects of aging degradation in the measured frequencies, and then apply outlier detection through direct density ratio estimation. Through experiments using 10 fresh commercial FPGAs and 2 out of them that were aged, we demonstrate the proposed method can detect these two recycled FPGAs without misclassification.
Keyword (in Japanese) (See Japanese page) 
(in English) Recycled FPGA detection / Manufacturing process variation / Unsupervised outlier detection / Direct density ratio estimation / / / /  
Reference Info. IEICE Tech. Rep., vol. 120, no. 436, DC2020-90, pp. 61-66, March 2021.
Paper # DC2020-90 
Date of Issue 2021-03-18 (CPSY, DC) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPSY2020-60 DC2020-90

Conference Information
Committee CPSY DC IPSJ-SLDM IPSJ-EMB IPSJ-ARC  
Conference Date 2021-03-25 - 2021-03-26 
Place (in Japanese) (See Japanese page) 
Place (in English) Online 
Topics (in Japanese) (See Japanese page) 
Topics (in English) ETNET2021 
Paper Information
Registration To DC 
Conference Code 2021-03-CPSY-DC-SLDM-EMB-ARC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Unsupervised Recycled FPGA Detection Using Direct Density Ratio Estimation Based on Self-referencing 
Sub Title (in English)  
Keyword(1) Recycled FPGA detection  
Keyword(2) Manufacturing process variation  
Keyword(3) Unsupervised outlier detection  
Keyword(4) Direct density ratio estimation  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Yuya Isaka  
1st Author's Affiliation Kwansei Gakuin University (KGU)
2nd Author's Name Michihiro Shintani  
2nd Author's Affiliation Graduate School of Science and Technology, Nara Institute of Science and Technology (NAIST)
3rd Author's Name Foisal Ahmed  
3rd Author's Affiliation Prime University (PU)
4th Author's Name Michiko Inoue  
4th Author's Affiliation Graduate School of Science and Technology, Nara Institute of Science and Technology (NAIST)
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Speaker Author-1 
Date Time 2021-03-26 10:40:00 
Presentation Time 20 minutes 
Registration for DC 
Paper # CPSY2020-60, DC2020-90 
Volume (vol) vol.120 
Number (no) no.435(CPSY), no.436(DC) 
Page pp.61-66 
#Pages
Date of Issue 2021-03-18 (CPSY, DC) 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan