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| Presentation | 2021-06-22 13:50 [Memorial Lecture] Operation mechanism of Si/HZO ferroelectric FETs -- Role of MOS (MFS) interface -- Kasidit Toprasertpong, Tsung-En Lee, Zaoyang Lin, Kento Tahara, Kouhei Watanabe, Mitsuru Takenaka, Shinichi Takagi (Univ. Tokyo)  SDM2021-23 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | In this talk, we will introduce our findings on the mechanisms at the MFIS interface and their impacts on the memory characteristics of Si/HfO2-based ferroelectric FETs. The charge trapping near the interfacial layer, which exists between the HfO2-based ferroelectric insulator and the Si channel, is the key factor that determines the device operation. Under positive gate voltage, the electron-trap-assisted polarization reversal is the mechanism that drives the memory characteristics of n-channel ferroelectric FETs, while the similar mechanism cannot be observed for holes under negative voltage. Moreover, it is also found that the MFIS interface-state density is an important factor that affects the memory characteristics. We show that low interface-state density at the Hf0.5Zr0.5O2/Si interface can be achieved by performing the ferroelectric-phase crystallization with low-temperature annealing. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Ferroelectric FET / Interface / Polarization reversal / Device operation / Memory characteristics / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 121, no. 71, SDM2021-23, pp. 7-12, June 2021. | |
| Paper # | SDM2021-23 | |
| Date of Issue | 2021-06-15 (SDM) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | SDM2021-23 |
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| Conference Information | |
| Committee | SDM |
| Conference Date | 2021-06-22 - 2021-06-22 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Material Science and Process Technology for MOS Devices and Memories |
| Paper Information | |
| Registration To | SDM |
| Conference Code | 2021-06-SDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Operation mechanism of Si/HZO ferroelectric FETs |
| Sub Title (in English) | Role of MOS (MFS) interface |
| Keyword(1) | Ferroelectric FET |
| Keyword(2) | Interface |
| Keyword(3) | Polarization reversal |
| Keyword(4) | Device operation |
| Keyword(5) | Memory characteristics |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Kasidit Toprasertpong |
| 1st Author's Affiliation | The University of Tokyo (Univ. Tokyo) |
| 2nd Author's Name | Tsung-En Lee |
| 2nd Author's Affiliation | The University of Tokyo (Univ. Tokyo) |
| 3rd Author's Name | Zaoyang Lin |
| 3rd Author's Affiliation | The University of Tokyo (Univ. Tokyo) |
| 4th Author's Name | Kento Tahara |
| 4th Author's Affiliation | The University of Tokyo (Univ. Tokyo) |
| 5th Author's Name | Kouhei Watanabe |
| 5th Author's Affiliation | The University of Tokyo (Univ. Tokyo) |
| 6th Author's Name | Mitsuru Takenaka |
| 6th Author's Affiliation | The University of Tokyo (Univ. Tokyo) |
| 7th Author's Name | Shinichi Takagi |
| 7th Author's Affiliation | The University of Tokyo (Univ. Tokyo) |
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| Speaker | 1 |
| Date Time | 2021-06-22 13:50:00 |
| Presentation Time | 40 |
| Registration for | SDM |
| Paper # | SDM2021-23 |
| Volume (vol) | 121 |
| Number (no) | no.71 |
| Page | pp.7-12 |
| #Pages | 6 |
| Date of Issue | 2021-06-15 (SDM) |
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