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Paper Abstract and Keywords
Presentation 2021-08-18 09:30
[Invited Talk] Analog in-memory computing in FeFET based 1T1R array for low-power edge AI applications
Daisuke Saito, Toshiyuki Kobayashi, Hiroki Koga (SONY), Yusuke Shuto, Jun Okuno, Kenta Konishi (SSS), Masanori Tsukamoto, Kazunobu Ohkuri (SONY), Taku Umebayashi (SSS), Takayuki Ezaki (SONY) SDM2021-36 ICD2021-7
Abstract (in Japanese) (See Japanese page) 
(in English) Deep neural network (DNN) inference for edge AI requires low-power operation, which can be achieved by implementing massively parallel matrix-vector multiplications (MVM) in the analog domain on a highly resistive memory array. We propose a 1T1R compute cell (1T1R-cell) using a ferroelectric hafnium oxide-based FET (FeFET) and TiN/SiO2 tunneling junction of MΩ resistor (MOR) for analog in-memory computing (AiMC). The MOR exhibited a tunneling current behavior and MΩ resistance. A 1T1R-cell array-level evaluation was also performed. A random access for writing with low write disturbance scheme was confirmed from the summation-DC-current output, and binaries were successfully classified into “T” and “L.” Based on the experimental results of our proposed 1T1R-cell, we obtained a state-of-the-art energy efficiency of 13700 TOPS/W including the periphery. Furthermore, we confirmed that a high inference accuracy can be obtained with our low-resistance-variability 1T1R-cell with a properly trained model.
Keyword (in Japanese) (See Japanese page) 
(in English) deep neural network / 1T1R-cell / analog in-memory computing / matrix-vector multiplication / FeFET / tunneling junction resistor / /  
Reference Info. IEICE Tech. Rep., vol. 121, no. 138, SDM2021-36, pp. 33-37, Aug. 2021.
Paper # SDM2021-36 
Date of Issue 2021-08-10 (SDM, ICD) 
ISSN Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee SDM ICD ITE-IST  
Conference Date 2021-08-17 - 2021-08-18 
Place (in Japanese) (See Japanese page) 
Place (in English) Online 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Analog, Mixed Analog and Digital, RF, and Sensor Interface, Low Voltage/Low Power Techniques, Novel Devices/Circuits, and the Applications 
Paper Information
Registration To SDM 
Conference Code 2021-08-SDM-ICD-IST 
Language English (Japanese title is available) 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Analog in-memory computing in FeFET based 1T1R array for low-power edge AI applications 
Sub Title (in English)  
Keyword(1) deep neural network  
Keyword(2) 1T1R-cell  
Keyword(3) analog in-memory computing  
Keyword(4) matrix-vector multiplication  
Keyword(5) FeFET  
Keyword(6) tunneling junction resistor  
Keyword(7)  
Keyword(8)  
1st Author's Name Daisuke Saito  
1st Author's Affiliation Sony Group Corporation (SONY)
2nd Author's Name Toshiyuki Kobayashi  
2nd Author's Affiliation Sony Group Corporation (SONY)
3rd Author's Name Hiroki Koga  
3rd Author's Affiliation Sony Group Corporation (SONY)
4th Author's Name Yusuke Shuto  
4th Author's Affiliation Sony Semiconductor Solutions Corporation (SSS)
5th Author's Name Jun Okuno  
5th Author's Affiliation Sony Semiconductor Solutions Corporation (SSS)
6th Author's Name Kenta Konishi  
6th Author's Affiliation Sony Semiconductor Solutions Corporation (SSS)
7th Author's Name Masanori Tsukamoto  
7th Author's Affiliation Sony Group Corporation (SONY)
8th Author's Name Kazunobu Ohkuri  
8th Author's Affiliation Sony Group Corporation (SONY)
9th Author's Name Taku Umebayashi  
9th Author's Affiliation Sony Semiconductor Solutions Corporation (SSS)
10th Author's Name Takayuki Ezaki  
10th Author's Affiliation Sony Group Corporation (SONY)
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Speaker Author-1 
Date Time 2021-08-18 09:30:00 
Presentation Time 45 minutes 
Registration for SDM 
Paper # SDM2021-36, ICD2021-7 
Volume (vol) vol.121 
Number (no) no.138(SDM), no.139(ICD) 
Page pp.33-37 
#Pages
Date of Issue 2021-08-10 (SDM, ICD) 


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