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Paper Abstract and Keywords
Presentation 2021-12-01 14:45
Improving Accuracy of Addition for Stochastic Computing
Ichilawa Katsuhiro, Shigeru Yamashita (Ritsumeikan Univ.) VLD2021-27 ICD2021-37 DC2021-33 RECONF2021-35
Abstract (in Japanese) (See Japanese page) 
(in English) Stochastic Computing (SC) is an approximate computing paradigm to perform calculations by using Stochastic Numbers (SNs) which are bit-streams representing values by their probabilities to be 1.
We use a multiplexer to perform addition operations in SC, but the value of an addition becomes half. This means that addition operations in SC loose some information; there is a scaling error.
Accordingly, this paper proposes two novel method to realize SC-adder without using a multiplexer.
The first is a bit-storing saturation adder with an error-correcting bit-storing added to the SC saturation adder that uses an OR gate. The second is an SN compression saturation adder that realizes addition by expressing the SNs used for SC operations with a smaller number of SNs. By combining these two methods, we propose an adder with higher calculation accuracy than an adder using a multiplexer.
Keyword (in Japanese) (See Japanese page) 
(in English) Stochastic Computing / Adder with Multiplexer / Scaling / Saturation Adder / / / /  
Reference Info. IEICE Tech. Rep., vol. 121, no. 277, VLD2021-27, pp. 60-65, Dec. 2021.
Paper # VLD2021-27 
Date of Issue 2021-11-24 (VLD, ICD, DC, RECONF) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2021-27 ICD2021-37 DC2021-33 RECONF2021-35

Conference Information
Committee VLD DC RECONF ICD IPSJ-SLDM  
Conference Date 2021-12-01 - 2021-12-02 
Place (in Japanese) (See Japanese page) 
Place (in English) Online 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2021 -New Field of VLSI Design- 
Paper Information
Registration To VLD 
Conference Code 2021-12-VLD-DC-RECONF-ICD-SLDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Improving Accuracy of Addition for Stochastic Computing 
Sub Title (in English)  
Keyword(1) Stochastic Computing  
Keyword(2) Adder with Multiplexer  
Keyword(3) Scaling  
Keyword(4) Saturation Adder  
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1st Author's Name Ichilawa Katsuhiro  
1st Author's Affiliation Ritsumeikan University (Ritsumeikan Univ.)
2nd Author's Name Shigeru Yamashita  
2nd Author's Affiliation Ritsumeikan University (Ritsumeikan Univ.)
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Speaker Author-1 
Date Time 2021-12-01 14:45:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2021-27, ICD2021-37, DC2021-33, RECONF2021-35 
Volume (vol) vol.121 
Number (no) no.277(VLD), no.278(ICD), no.279(DC), no.280(RECONF) 
Page pp.60-65 
#Pages 6 
Date of Issue 2021-11-24 (VLD, ICD, DC, RECONF) 

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