| Paper Abstract and Keywords |
| Presentation |
2021-12-02 10:35
Calculation method of correctly rounded exponential function on an FPGA Takuya Haraguchi, Naofumi Takagi (Kyoto Univ.) VLD2021-35 ICD2021-45 DC2021-41 RECONF2021-43 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
We propose the FPGA-oriented calculation method of correctly rounded exponential function, exp, which is one of the functions recommended for correct rounding in IEEE754 standard. In this calculation method, exp is calculated with high-radix STL method and Taylor series approximation. By restricting the direction of the calculation error to one direction depending on the sign of the input, we reduce the accuracy required for correct rounding from 158 bits to 114 bits. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
IEEE754 / exponential function / double precision / floating point number / correct rounding / high-radix STL method / FPGA / |
| Reference Info. |
IEICE Tech. Rep., vol. 121, no. 277, VLD2021-35, pp. 105-110, Dec. 2021. |
| Paper # |
VLD2021-35 |
| Date of Issue |
2021-11-24 (VLD, ICD, DC, RECONF) |
| ISSN |
Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| Download PDF |
VLD2021-35 ICD2021-45 DC2021-41 RECONF2021-43 |
| Conference Information |
| Committee |
VLD DC RECONF ICD IPSJ-SLDM |
| Conference Date |
2021-12-01 - 2021-12-02 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
Online |
| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
Design Gaia 2021 -New Field of VLSI Design- |
| Paper Information |
| Registration To |
VLD |
| Conference Code |
2021-12-VLD-DC-RECONF-ICD-SLDM |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
Calculation method of correctly rounded exponential function on an FPGA |
| Sub Title (in English) |
|
| Keyword(1) |
IEEE754 |
| Keyword(2) |
exponential function |
| Keyword(3) |
double precision |
| Keyword(4) |
floating point number |
| Keyword(5) |
correct rounding |
| Keyword(6) |
high-radix STL method |
| Keyword(7) |
FPGA |
| Keyword(8) |
|
| 1st Author's Name |
Takuya Haraguchi |
| 1st Author's Affiliation |
Kyoto University (Kyoto Univ.) |
| 2nd Author's Name |
Naofumi Takagi |
| 2nd Author's Affiliation |
Kyoto University (Kyoto Univ.) |
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| Speaker |
Author-1 |
| Date Time |
2021-12-02 10:35:00 |
| Presentation Time |
25 minutes |
| Registration for |
VLD |
| Paper # |
VLD2021-35, ICD2021-45, DC2021-41, RECONF2021-43 |
| Volume (vol) |
vol.121 |
| Number (no) |
no.277(VLD), no.278(ICD), no.279(DC), no.280(RECONF) |
| Page |
pp.105-110 |
| #Pages |
6 |
| Date of Issue |
2021-11-24 (VLD, ICD, DC, RECONF) |