Paper Abstract and Keywords |
Presentation |
2022-01-23 09:50
Analog-circuit design of STDP learning rule with linear decay and its LSI implementation Satoshi Moriya, Tatsuki Kato (Tohoku Univ.), Yasushi Yuminaka (Gunma Univ.), Hideaki Yamamoto, Shigeo Sato, Yoshihiko Horio (Tohoku Univ.) NC2021-40 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Spiking neural networks (SNNs) are expected to be the next generation of information processing technology to reduce the power consumption and size of devices. Spike-timing-dependent plasticity (STDP) rule can learn the synaptic weight only from the spike timing information; therefore, its applications are studied as an efficient learning rule for SNNs. In this study, we report the design of an analog circuit which performs the STDP learning rule that considers the weight dependency and decay term. The weight value which corresponds to the voltage in the circuit varies exponentially with the time difference between spikes, and the amount of weight decay can be controlled linearly for the bias current is shown via SPICE simulations. We also show the results of LSI implementation of the circuit using 65 nm CMOS process. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Spike-timing-dependent plasticity / analog circuit / hardware implementation / spiking neural network / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 121, no. 338, NC2021-40, pp. 44-44, Jan. 2022. |
Paper # |
NC2021-40 |
Date of Issue |
2022-01-14 (NC) |
ISSN |
Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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NC2021-40 |
Conference Information |
Committee |
NLP MICT MBE NC |
Conference Date |
2022-01-21 - 2022-01-23 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Online |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
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Paper Information |
Registration To |
NC |
Conference Code |
2022-01-NLP-MICT-MBE-NC |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Analog-circuit design of STDP learning rule with linear decay and its LSI implementation |
Sub Title (in English) |
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Keyword(1) |
Spike-timing-dependent plasticity |
Keyword(2) |
analog circuit |
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hardware implementation |
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spiking neural network |
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1st Author's Name |
Satoshi Moriya |
1st Author's Affiliation |
Tohoku University (Tohoku Univ.) |
2nd Author's Name |
Tatsuki Kato |
2nd Author's Affiliation |
Tohoku University (Tohoku Univ.) |
3rd Author's Name |
Yasushi Yuminaka |
3rd Author's Affiliation |
Gunma University (Gunma Univ.) |
4th Author's Name |
Hideaki Yamamoto |
4th Author's Affiliation |
Tohoku University (Tohoku Univ.) |
5th Author's Name |
Shigeo Sato |
5th Author's Affiliation |
Tohoku University (Tohoku Univ.) |
6th Author's Name |
Yoshihiko Horio |
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Tohoku University (Tohoku Univ.) |
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Speaker |
Author-1 |
Date Time |
2022-01-23 09:50:00 |
Presentation Time |
25 minutes |
Registration for |
NC |
Paper # |
NC2021-40 |
Volume (vol) |
vol.121 |
Number (no) |
no.338 |
Page |
p.44 |
#Pages |
1 |
Date of Issue |
2022-01-14 (NC) |
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