| Paper Abstract and Keywords |
| Presentation |
2022-01-31 16:00
[Invited Talk]
**** Keiichi Nakazawa, Junpei Yamamoto, Shigetaka Mori, Shintaro Okamoto, Akito Shimizu, Koichi Baba, Nobutoshi Fujii, Mutsuo Uehara, Katsunori Hiramatsu, Hideomi Kumano, Akira Matsumoto, Koichiro Zaitsu, Hidetoshi Ohnuma, Keiji Tatani, Tomoyuki Hirano, Hayato Iwamoto (Sony Semiconductor Solutions) SDM2021-73 |
| Abstract |
(in Japanese) |
(See Japanese page) |
| (in English) |
We developed a new structure of pixel transistors stacked over photodiode named “2-Layer Transistor Pixel Stacked CMOS Image Sensor” (2-Layer Pixel). It was fabricated by 3D sequential process integration with new process techniques, such as thermally stable wafer bonding and deep contacts. With this technology, we successfully increased AMP size and demonstrated backside-illuminated CMOS image sensor of 6752 x 4928 pixels at 0.7um pitch to prove its functionality and integrity. |
| Keyword |
(in Japanese) |
(See Japanese page) |
| (in English) |
3D Sequential / 2-Layer Pixel / wafer bonding / deep contact / / / / |
| Reference Info. |
IEICE Tech. Rep., vol. 121, no. 365, SDM2021-73, pp. 20-23, Jan. 2022. |
| Paper # |
SDM2021-73 |
| Date of Issue |
2022-01-24 (SDM) |
| ISSN |
Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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| Download PDF |
SDM2021-73 |