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Paper Abstract and Keywords
Presentation 2022-03-03 12:45
[Memorial Lecture] Integration Techniques of Phase Locked Loops on high-speed and high- precision for wireline and wireless applications
Masaru Kokubo (Hitachi) CAS2021-78 CS2021-80
Abstract (in Japanese) (See Japanese page) 
(in English) The configurations of the PLLs for modulation are described. This paper summarizes the technical points in the integrated circuits of the input modulation PLL for mobile phones, the feedback loop modulation PLL for high-speed transmission, and the two-point modulation PLL for short-range radios. In addition, as a future technology of PLL, high-Q inductor is one of the technologies for lower power consumption, and the other is a digitization of the entire PLL to reduce the phase noise due to a modulation. A loop adopting with a precise digital phase comparison and a digital controlled oscillator with highly linearity will become key technologies.
Keyword (in Japanese) (See Japanese page) 
(in English) PLL / modulation / wireless communications / wireline communications / control circuits / integrated circuits / /  
Reference Info. IEICE Tech. Rep., vol. 121, no. 394, CAS2021-78, pp. 25-30, March 2022.
Paper # CAS2021-78 
Date of Issue 2022-02-24 (CAS, CS) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CAS2021-78 CS2021-80

Conference Information
Committee CAS CS  
Conference Date 2022-03-03 - 2022-03-04 
Place (in Japanese) (See Japanese page) 
Place (in English) Online 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Network processor, Signal processing and circuits for communications, Wireless LAN / PAN, etc. 
Paper Information
Registration To CAS 
Conference Code 2022-03-CAS-CS 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Integration Techniques of Phase Locked Loops on high-speed and high- precision for wireline and wireless applications 
Sub Title (in English)  
Keyword(1) PLL  
Keyword(2) modulation  
Keyword(3) wireless communications  
Keyword(4) wireline communications  
Keyword(5) control circuits  
Keyword(6) integrated circuits  
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1st Author's Name Masaru Kokubo  
1st Author's Affiliation Hitachi Ltd. (Hitachi)
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Speaker Author-1 
Date Time 2022-03-03 12:45:00 
Presentation Time 60 minutes 
Registration for CAS 
Paper # CAS2021-78, CS2021-80 
Volume (vol) vol.121 
Number (no) no.394(CAS), no.395(CS) 
Page pp.25-30 
#Pages
Date of Issue 2022-02-24 (CAS, CS) 


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