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Paper Abstract and Keywords
Presentation 2022-07-27 11:00
A Block Partitioning Method to Accelerate Test Generation for Gate-Exhaustive Faults
Momona Mizota, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyou Univ.) CPSY2022-3 DC2022-3
Abstract (in Japanese) (See Japanese page) 
(in English) In gate-exhaustive fault model which covers defects in cells, since the number of faults is proportion to that of gates, the numbers of faults and test patterns increase with the increasing in the number of gates. Therefore, for gate-exhaustive faults, a multiple target test generation method which is one of dynamic test compaction methods has been proposed to reduce the number of test patterns. However, the test generation time is problem. Also, region-exhaustive fault model which is defined in block units without defining faults in cell units has been proposed to reduce the number of faults for the test generation. Blocks where region-exhaustive faults are defined was configured such that the number of defined faults is smaller than that of gate -exhaustive faults. However, there are problems such as a decrease in fault coverage for region-exhaustive faults and an increase in the number of test patterns. In this paper, we propose a block partitioning method to reduce the number of region-exhaustive faults while maintaining fault coverage for gate-exhaustive faults. The experimental results for ISCAS89 benchmark circuits showed that the proposed block partitioning method reduced the test generation time by 37.94%, reduced the number of faults by 30.65%, reduced the number of test patterns by 16.75%, and increased the fault coverage for gate-exhaustive faults by 6.97% on average compared to the conventional block partitioning method.
Keyword (in Japanese) (See Japanese page) 
(in English) gate-exhaustive fault model / multiple target test generation / region-exhaustive faults / block partitioning / untestable faults / / /  
Reference Info. IEICE Tech. Rep., vol. 122, no. 134, DC2022-3, pp. 13-18, July 2022.
Paper # DC2022-3 
Date of Issue 2022-07-20 (CPSY, DC) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPSY2022-3 DC2022-3

Conference Information
Committee CPSY DC IPSJ-ARC  
Conference Date 2022-07-27 - 2022-07-29 
Place (in Japanese) (See Japanese page) 
Place (in English) Kaikyo Messe Shimonoseki 
Topics (in Japanese) (See Japanese page) 
Topics (in English) SWoPP2022: Parallel, Distributed and Cooperative Processing Systems and Dependable Computing 
Paper Information
Registration To DC 
Conference Code 2022-07-CPSY-DC-ARC 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Block Partitioning Method to Accelerate Test Generation for Gate-Exhaustive Faults 
Sub Title (in English)  
Keyword(1) gate-exhaustive fault model  
Keyword(2) multiple target test generation  
Keyword(3) region-exhaustive faults  
Keyword(4) block partitioning  
Keyword(5) untestable faults  
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1st Author's Name Momona Mizota  
1st Author's Affiliation Nihon University (Nihon Univ.)
2nd Author's Name Toshinori Hosokawa  
2nd Author's Affiliation Nihon University (Nihon Univ.)
3rd Author's Name Masayoshi Yoshimura  
3rd Author's Affiliation Kyoto Sangyou University (Kyoto Sangyou Univ.)
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Speaker Author-1 
Date Time 2022-07-27 11:00:00 
Presentation Time 30 minutes 
Registration for DC 
Paper # CPSY2022-3, DC2022-3 
Volume (vol) vol.122 
Number (no) no.133(CPSY), no.134(DC) 
Page pp.13-18 
#Pages 6 
Date of Issue 2022-07-20 (CPSY, DC) 

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