Paper Abstract and Keywords |
Presentation |
2022-08-08 15:45
Evaluation of Low-Latency Cryptography MANTIS based Low-Power oriented Tamper-Resistant Circuit Kosuke Hamaguchi, Shu Takemoto, Yusuke Nozaki, Masaya Yoshikawa (Meijo Univ.) SDM2022-41 ICD2022-9 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Lightweight cryptography can not only be implemented in a small area, but also with low latency and low power consumption. Therefore, they are suitable for use in IoT devices Among them, MANTIS, a low-latency cryptography, is more resistant to related-key attack than conventional light-weight cryptography by using a tuning value called “Tweak”. On the other hand, side-channel attacks have been conducted against MANTIS using selected plaintexts, making tamper resistance an issue. This study evaluates the effectiveness of a tamper resistance and low-power-consumption countermeasure circuit based on the low-latency cryptosystem MANTIS by implementing it on an FPGA. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Hardware Security / Lightweight Block Cipher / MANTIS / Tamper Resistance / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 122, no. 149, ICD2022-9, pp. 31-36, Aug. 2022. |
Paper # |
ICD2022-9 |
Date of Issue |
2022-08-01 (SDM, ICD) |
ISSN |
Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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SDM2022-41 ICD2022-9 |
Conference Information |
Committee |
ICD SDM ITE-IST |
Conference Date |
2022-08-08 - 2022-08-10 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
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Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Analog, Mixed Analog and Digital, RF, and Sensor Interface, Low Voltage/Low Power Techniques, Novel Devices/Circuits, and the Applications |
Paper Information |
Registration To |
ICD |
Conference Code |
2022-08-ICD-SDM-IST |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Evaluation of Low-Latency Cryptography MANTIS based Low-Power oriented Tamper-Resistant Circuit |
Sub Title (in English) |
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Hardware Security |
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Lightweight Block Cipher |
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MANTIS |
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Tamper Resistance |
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1st Author's Name |
Kosuke Hamaguchi |
1st Author's Affiliation |
Meijo University (Meijo Univ.) |
2nd Author's Name |
Shu Takemoto |
2nd Author's Affiliation |
Meijo University (Meijo Univ.) |
3rd Author's Name |
Yusuke Nozaki |
3rd Author's Affiliation |
Meijo University (Meijo Univ.) |
4th Author's Name |
Masaya Yoshikawa |
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Meijo University (Meijo Univ.) |
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Speaker |
Author-1 |
Date Time |
2022-08-08 15:45:00 |
Presentation Time |
25 minutes |
Registration for |
ICD |
Paper # |
SDM2022-41, ICD2022-9 |
Volume (vol) |
vol.122 |
Number (no) |
no.148(SDM), no.149(ICD) |
Page |
pp.31-36 |
#Pages |
6 |
Date of Issue |
2022-08-01 (SDM, ICD) |
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