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Paper Abstract and Keywords
Presentation 2022-10-11 16:15
Low power quantized neural network by reducing the operating voltage of SRAM
Ji Wu, Kazuteru Namba (Chiba Univ) CPSY2022-20 DC2022-20
Abstract (in Japanese) (See Japanese page) 
(in English) With the advancement of artificial intelligence technologies, neural networks have been attracting attention as a machine learning technique that provides superior performance in image recognition. Since high-precision neural network computing inevitably requires enormous computational resources and power consumption, there are challenges in integrating neural networks into edge devices with limited memory and power consumption. Therefore, to reduce the computational load, research has been conducted to quantize neural network operations, which are composed of many multiplications and additions, to a low-bit number and to execute them on dedicated hardware such as AIoT (Artificial Intelligence of Things). In this paper, we propose an SRAM based on high-voltage and low-voltage modes to store the weights of the quantized neural network. In general, quantization of neural networks and lowering the operating voltage of SRAM reduce the recognition accuracy rate. We investigated the relationship between the two operations mentioned above and the recognition accuracy rate. We proposed a circuit model that can lower power consumption while maintaining a high recognition rate.
Keyword (in Japanese) (See Japanese page) 
(in English) Quantization / Neural Networks / SRAM / / / / /  
Reference Info. IEICE Tech. Rep., vol. 122, no. 205, DC2022-20, pp. 14-19, Oct. 2022.
Paper # DC2022-20 
Date of Issue 2022-10-04 (CPSY, DC) 
ISSN Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee CPSY DC IPSJ-ARC  
Conference Date 2022-10-11 - 2022-10-12 
Place (in Japanese) (See Japanese page) 
Place (in English) Yuzawa Toei Hotel 
Topics (in Japanese) (See Japanese page) 
Topics (in English) System Architecture, Computer Systems, Dependable Computing, etc. 
Paper Information
Registration To DC 
Conference Code 2022-10-CPSY-DC-ARC 
Language English (Japanese title is available) 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Low power quantized neural network by reducing the operating voltage of SRAM 
Sub Title (in English)  
Keyword(1) Quantization  
Keyword(2) Neural Networks  
Keyword(3) SRAM  
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1st Author's Name Ji Wu  
1st Author's Affiliation Chiba University (Chiba Univ)
2nd Author's Name Kazuteru Namba  
2nd Author's Affiliation Chiba University (Chiba Univ)
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Speaker Author-1 
Date Time 2022-10-11 16:15:00 
Presentation Time 30 minutes 
Registration for DC 
Paper # CPSY2022-20, DC2022-20 
Volume (vol) vol.122 
Number (no) no.204(CPSY), no.205(DC) 
Page pp.14-19 
#Pages
Date of Issue 2022-10-04 (CPSY, DC) 


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