IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2022-11-07 12:10
[Invited Talk] Implementation of Packet Level-Index Modulation
Mai Ohta (Fukuoka Univ.), Takeo Fujii, Koich Adachi (UEC), Osamu Takyu (Shinsyu Univ.) SR2022-50
Abstract (in Japanese) (See Japanese page) 
(in English) Packet-Level Index Modulation (PLIM) for Low Power Wide Area (LPWA) as a method to increase the number of transmitted bits under various constraints has been proposed. In LPWA, a communication time ratio called duty cycle and low power consumption for battery operation are mandatory conditions. LoRaWAN (Long Range WAN) is one of the standards used for LPWA. In LoRa, information is transmitted by LoRa modulation using chirp modulation, and it is difficult to increase the number of transmission bits because the duty cycle must be satisfied. Therefore, PLIM has been proposed to increase the number of transmitted information bits by adding information to the frequency and time indices of packets while performing packet communication. When information is added to the index of a packet, the amount of information by the indexes is limited by the number of frequency index and time index. In addition, since LoRaWAN is used in systems that transmit packets at regular intervals, such as IoT, there is a possibility of continuous collisions between nodes due to periodic transmission if packets are transmitted continuously with the same index. Furthermore, PLIM requires time synchronization between transmitter and receiver, especially when time indexes are detected. This presentation introduces the periodic packet collision avoidance scheme and synchronization-free differential PLIM that we have studied, and reports on our current research for the implementation of PLIM, which is being conducted as a research project commissioned by the Ministry of Internal Affairs and Communications.
Keyword (in Japanese) (See Japanese page) 
(in English) Low Power Wide Area / Packet-Level Index Modulation / Differential Packet-Level Index Modulation / / / / /  
Reference Info. IEICE Tech. Rep., vol. 122, no. 243, SR2022-50, pp. 29-29, Nov. 2022.
Paper # SR2022-50 
Date of Issue 2022-10-31 (SR) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SR2022-50

Conference Information
Committee SR  
Conference Date 2022-11-07 - 2022-11-08 
Place (in Japanese) (See Japanese page) 
Place (in English) Fukuoka University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Software Defined Radio, Cognitive Radio, Spectrum Sharing, etc. 
Paper Information
Registration To SR 
Conference Code 2022-11-SR 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Implementation of Packet Level-Index Modulation 
Sub Title (in English)  
Keyword(1) Low Power Wide Area  
Keyword(2) Packet-Level Index Modulation  
Keyword(3) Differential Packet-Level Index Modulation  
Keyword(4)  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Mai Ohta  
1st Author's Affiliation Fukuoka University (Fukuoka Univ.)
2nd Author's Name Takeo Fujii  
2nd Author's Affiliation The University of Electro-Communications (UEC)
3rd Author's Name Koich Adachi  
3rd Author's Affiliation The University of Electro-Communications (UEC)
4th Author's Name Osamu Takyu  
4th Author's Affiliation Shinsyu University (Shinsyu Univ.)
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Speaker Author-1 
Date Time 2022-11-07 12:10:00 
Presentation Time 50 minutes 
Registration for SR 
Paper # SR2022-50 
Volume (vol) vol.122 
Number (no) no.243 
Page p.29 
#Pages
Date of Issue 2022-10-31 (SR) 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan