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Paper Abstract and Keywords
Presentation 2022-12-08 14:00
[Poster Presentation] Using S Gates and Relative Phase Toffoli Gates to Improve T-Count depth in Quantum Boolean Circuit
David Lawrence Bantug Clarino, Shohei Kuroda, Shigeru Yamashita (Ritsumeikan Univ)
Abstract (in Japanese) (See Japanese page) 
(in English) Toffoli gates are an important primitive in reversible Boolean logic. In quantum computation, these Toffoli gates are composed using other elementary gates, most notably the Clifford+T basis. However, in fault-tolerant implementations of quantum circuits, a non-transversal gate like the T gate incurs extra cost relative to transversal gates like the S and CNOT gates. Relative-phase Toffoli Gates (RTOF) have been proposed as a way to minimize this “T-depth” at the cost of incurring a relative phase that could skew the final quantum states. While previous research has proposed a way to use transversal S gates to eliminate this relative phase, this paper proposes a novel form of the RTOF that incorporates S gates in order to simplify generation of the logic to return the phase.
Keyword (in Japanese) (See Japanese page) 
(in English) Relative Phase Toffoli Gate / T Gate / Optimization / / / / /  
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Conference Information
Committee QIT  
Conference Date 2022-12-08 - 2022-12-09 
Place (in Japanese) (See Japanese page) 
Place (in English) Keio Univ. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Quantum Information 
Paper Information
Registration To QIT 
Conference Code 2022-12-QIT 
Language English (Japanese title is available) 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Using S Gates and Relative Phase Toffoli Gates to Improve T-Count depth in Quantum Boolean Circuit 
Sub Title (in English)  
Keyword(1) Relative Phase Toffoli Gate  
Keyword(2) T Gate  
Keyword(3) Optimization  
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1st Author's Name David Lawrence Bantug Clarino  
1st Author's Affiliation Ritsumeikan University (Ritsumeikan Univ)
2nd Author's Name Shohei Kuroda  
2nd Author's Affiliation Ritsumeikan University (Ritsumeikan Univ)
3rd Author's Name Shigeru Yamashita  
3rd Author's Affiliation Ritsumeikan University (Ritsumeikan Univ)
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Speaker Author-1 
Date Time 2022-12-08 14:00:00 
Presentation Time 60 minutes 
Registration for QIT 
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