講演抄録/キーワード |
講演名 |
2023-03-02 13:50
[記念講演]CNFET7: An Open Source Cell Library for 7-nm CNFET Technology ○Chenlin Shi・Shinobu Miwa(UEC)・Tongxin Yang・Ryota Shioya(UOT)・Hayato Yamaki・Hiroki Honda(UEC) VLD2022-92 HWS2022-63 |
抄録 |
(和) |
(まだ登録されていません) |
(英) |
In this paper, we propose CNFET7, the first open-source cell library for7-nm carbon nanotube field-effect transistor (CNFET) technology. CNFET7 is based on an open-source CNFET SPICE model called VS-CNFET, and various model parameters such as the channel width and carbon nanotube diameter are carefully tuned to mimic the predictive 7-nm CNFET technology presented in a published paper. Some nondisclosure parameters, such as the cell size and pin layout, are derived from those of the NanGate 15-nm open-source cell library in the same way as for an open-source framework for CNFET circuit design. CNFET7 includes two types of delay model (i.e.,the composite current source and nonlinear delay model), each having 56 cells, such as INV_X1 and BUF_X1. CNFET7 supports both logic synthesis and timing-driven place and route in the Cadence design flow. Our experimental results of several synthesized circuits show that CNFET7 has reductions of up to 96%, 62% and 82% in dynamic and static power consumption and critical-path delay, respectively, when compared with ASAP7. In addition, our experimental results of a post-route microprocessor show that CNFET7 has reductions of up to 91%, 66% and 38% in dynamic and static power consumption and critical-path delay, respectively, when compared with ASAP7. |
キーワード |
(和) |
/ / / / / / / |
(英) |
CNFET / Logic Synthesis / Place and Route / Open-Source / Cell library / / / |
文献情報 |
信学技報, vol. 122, no. 402, VLD2022-92, pp. 110-110, 2023年3月. |
資料番号 |
VLD2022-92 |
発行日 |
2023-02-22 (VLD, HWS) |
ISSN |
Online edition: ISSN 2432-6380 |
著作権に ついて |
技術研究報告に掲載された論文の著作権は電子情報通信学会に帰属します.(許諾番号:10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
PDFダウンロード |
VLD2022-92 HWS2022-63 |
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