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| Presentation | 2023-07-13 09:25 A Study on Complexity Reduction of Bit Assignment and Performance Improvement by Channel Code Concatenation in Chaos Modulation Ryo Tozawa, Yuuki Mori, Seiya Yamashita, Eiji Okamoto (NITech), Tetsuya Yamamoto (Panasonic)  RCS2023-86 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | In recent years, with the rapid increase of Internet of Things (IoT) devices in industries, healthcare, and other fields, improving communication confidentiality has become a challenge. As one of the solutions, we have proposed chaos modulation, which is a type of common key encryption that possesses physical layer security. In chaos modulation, it is possible to obtain a modulated signal with irregular behavior dependent on a shared key. However, due to its nature, there is no correlation between the Hamming distance of information bits and the Euclidean distance between modulated signals, leaving room for improvement in bit error rate characteristics. In the past, we proposed a method that performs bit reallocation on the chaos modulated signal using the simulated annealing algorithm, a nonlinear optimization algorithm. However, this method faced the challenge of requiring immense computational complexity relative to the achievable gain. Therefore, in this paper, we propose a new method to reduce the computational complexity by changing the algorithm used for bit allocation to a greedy algorithm. Additionally, by applying this method to chaos modulation concatenated with low-density parity-check codes, we demonstrate that compared to existing methods, at a code length of 1024 and a coding rate of 0.75, a characteristic improvement of approximately 0.5 dB at a block error rate of 10^(-3) can be achieved. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | physical layer security / chaos modulation / optimization algorithm / greedy method / LDPC codes / BICM-ID / / | |
| Reference Info. | IEICE Tech. Rep., vol. 123, no. 108, RCS2023-86, pp. 33-38, July 2023. | |
| Paper # | RCS2023-86 | |
| Date of Issue | 2023-07-05 (RCS) | |
| ISSN | Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | RCS2023-86 |
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| Conference Information | |
| Committee | SeMI RCS RCC NS SR |
| Conference Date | 2023-07-12 - 2023-07-14 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Osaka University Nakanoshima Center + Online |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Distributed Wireless Network, M2M (Machine-to-Machine)，D2D (Device-to-Device)，IoT（Internet of Things）, etc |
| Paper Information | |
| Registration To | RCS |
| Conference Code | 2023-07-SeMI-RCS-RCC-NS-SR |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Study on Complexity Reduction of Bit Assignment and Performance Improvement by Channel Code Concatenation in Chaos Modulation |
| Sub Title (in English) | |
| Keyword(1) | physical layer security |
| Keyword(2) | chaos modulation |
| Keyword(3) | optimization algorithm |
| Keyword(4) | greedy method |
| Keyword(5) | LDPC codes |
| Keyword(6) | BICM-ID |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Ryo Tozawa |
| 1st Author's Affiliation | Nagoya Institute of Technology (NITech) |
| 2nd Author's Name | Yuuki Mori |
| 2nd Author's Affiliation | Nagoya Institute of Technology (NITech) |
| 3rd Author's Name | Seiya Yamashita |
| 3rd Author's Affiliation | Nagoya Institute of Technology (NITech) |
| 4th Author's Name | Eiji Okamoto |
| 4th Author's Affiliation | Nagoya Institute of Technology (NITech) |
| 5th Author's Name | Tetsuya Yamamoto |
| 5th Author's Affiliation | Panasonic Holdings Corporation (Panasonic) |
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| Speaker | Author-1 |
| Date Time | 2023-07-13 09:25:00 |
| Presentation Time | 25 minutes |
| Registration for | RCS |
| Paper # | RCS2023-86 |
| Volume (vol) | vol.123 |
| Number (no) | no.108 |
| Page | pp.33-38 |
| #Pages | 6 |
| Date of Issue | 2023-07-05 (RCS) |
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