Information: Join today and make your research activities more affordable! Technical workshop participation fees and annual registration fees are available at member rates.
Notice: [Important] Announcement of Changes to Registration Fee Payment and Manuscript Upload Procedures for IEICE Technical Meetings
IEICE Technical Committee Submission System
Conference Paper's Information		 Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2023-08-08 14:25
In-Depth Timing Characterization of the Adiabatic Quantum-Flux-Parametron Logic Gate
Yu Hoshika (YNU), Christopher L. Ayala (IAS- YNU), Nobuyuki Yoshikawa (IAS - YNU) SCE2023-9
Abstract (in Japanese) (See Japanese page) 
(in English) Adiabatic quantum-flux-parametron (AQFP) logic is a superconductor logic family and can operate at 5 GHz to 10 GHz with extremely low switching energy. We use digital simulation such as Verilog or SystemVerilog to design large-scale circuits using AQFP logic gates. Previous work on digital modeling used unconventional timing checks and timing characteristics of the AQFP logic gates were simplified. The intrinsic delays of the AQFP logic gate such as propagation and reset delay were not characterized deeply. To design large-scale circuits with GHz operating frequencies, a more in-depth timing characterization and more accurate timing model with industry-standard timing checks are needed. In this study, we investigated the appropriate timing definitions and new methods to evaluate the timing parameters of the AQFP logic gates for digital simulation. We observe new timing effects in the AQFP and determined how to properly consider them during characterization. We also consider a few approaches on how to realize the timing model and determined a candidate implementation.
Keyword (in Japanese) (See Japanese page) 
(in English) adiabatic quantum-flux-parametron / AQFP / Josephson integrated circuits / gate-level-modeling / timing characterization / / /  
Reference Info. IEICE Tech. Rep., vol. 123, no. 153, SCE2023-9, pp. 45-48, Aug. 2023.
Paper # SCE2023-9 
Date of Issue 2023-08-01 (SCE) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SCE2023-9

Conference Information
Committee SCE  
Conference Date 2023-08-08 - 2023-08-08 
Place (in Japanese) (See Japanese page) 
Place (in English) Yokohama National Univ. 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To SCE 
Conference Code 2023-08-SCE 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) In-Depth Timing Characterization of the Adiabatic Quantum-Flux-Parametron Logic Gate 
Sub Title (in English)  
Keyword(1) adiabatic quantum-flux-parametron  
Keyword(2) AQFP  
Keyword(3) Josephson integrated circuits  
Keyword(4) gate-level-modeling  
Keyword(5) timing characterization  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Yu Hoshika  
1st Author's Affiliation Yokohama National University (YNU)
2nd Author's Name Christopher L. Ayala  
2nd Author's Affiliation Institute of Advanced Sciences - Yokohama National University (IAS- YNU)
3rd Author's Name Nobuyuki Yoshikawa  
3rd Author's Affiliation Yokohama National University (IAS - YNU)
4th Author's Name  
4th Author's Affiliation ()
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
21st Author's Name  
21st Author's Affiliation ()
22nd Author's Name  
22nd Author's Affiliation ()
23rd Author's Name  
23rd Author's Affiliation ()
24th Author's Name  
24th Author's Affiliation ()
25th Author's Name  
25th Author's Affiliation ()
26th Author's Name / /
26th Author's Affiliation ()
()
27th Author's Name / /
27th Author's Affiliation ()
()
28th Author's Name / /
28th Author's Affiliation ()
()
29th Author's Name / /
29th Author's Affiliation ()
()
30th Author's Name / /
30th Author's Affiliation ()
()
31st Author's Name / /
31st Author's Affiliation ()
()
32nd Author's Name / /
32nd Author's Affiliation ()
()
33rd Author's Name / /
33rd Author's Affiliation ()
()
34th Author's Name / /
34th Author's Affiliation ()
()
35th Author's Name / /
35th Author's Affiliation ()
()
36th Author's Name / /
36th Author's Affiliation ()
()
Speaker Author-1 
Date Time 2023-08-08 14:25:00 
Presentation Time 25 minutes 
Registration for SCE 
Paper # SCE2023-9 
Volume (vol) vol.123 
Number (no) no.153 
Page pp.45-48 
#Pages 4 
Date of Issue 2023-08-01 (SCE) 

[Return to Top Page]

[Return to IEICE Web Page]
The Institute of Electronics, Information and Communication Engineers (IEICE), Japan