Paper Abstract and Keywords |
Presentation |
2023-10-31 10:00
Design of a Modularized Circuits Library for Binary Convolutional Neural Network Accelerator using Single Flux Quantum Circuits Zeyu Han, Zongyuan Li, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.) SCE2023-17 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
To implement a binary neural network (BNN) based on SFQ circuits, we designed a modularized circuits library based on the classical model of convolutional neural network (CNN), which contains common computational circuits such as convolutional circuits, accumulation circuits, pooling circuits, etc. The layout of each circuit is designed by 9-layer Nb 10 kA/cm2 process for the simulation purpose. Simulation results show that all circuits in the library can perform operations at above 50 GHz. The comparison results show that the energy efficiency of the BNN designed based on the proposed SFQ library is approximately 16x higher than that of a CMOS circuit with the same architecture even when the cooling energy consumption is considered to keep the circuits working in 4.2 K. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Convolutional Neural Network / Binary Neural Network / Single Flux Quantum Circuits / / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 123, no. 234, SCE2023-17, pp. 26-31, Oct. 2023. |
Paper # |
SCE2023-17 |
Date of Issue |
2023-10-23 (SCE) |
ISSN |
Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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SCE2023-17 |
Conference Information |
Committee |
SCE |
Conference Date |
2023-10-30 - 2023-10-31 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
RIEC, Tohoku Univ. |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Superconducting Electronics |
Paper Information |
Registration To |
SCE |
Conference Code |
2023-10-SCE |
Language |
English |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Design of a Modularized Circuits Library for Binary Convolutional Neural Network Accelerator using Single Flux Quantum Circuits |
Sub Title (in English) |
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Convolutional Neural Network |
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Binary Neural Network |
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Single Flux Quantum Circuits |
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1st Author's Name |
Zeyu Han |
1st Author's Affiliation |
Yokohama National University (Yokohama National Univ.) |
2nd Author's Name |
Zongyuan Li |
2nd Author's Affiliation |
Yokohama National University (Yokohama National Univ.) |
3rd Author's Name |
Yuki Yamanashi |
3rd Author's Affiliation |
Yokohama National University (Yokohama National Univ.) |
4th Author's Name |
Nobuyuki Yoshikawa |
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Yokohama National University (Yokohama National Univ.) |
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Speaker |
Author-1 |
Date Time |
2023-10-31 10:00:00 |
Presentation Time |
25 minutes |
Registration for |
SCE |
Paper # |
SCE2023-17 |
Volume (vol) |
vol.123 |
Number (no) |
no.234 |
Page |
pp.26-31 |
#Pages |
6 |
Date of Issue |
2023-10-23 (SCE) |
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