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Paper Abstract and Keywords
Presentation 2023-11-16 10:20
Proposal of MTJ-based non-volatile flip-flops using reference resistance and Two-step Store Control
Kousei Kaizu, Kimiyoshi Usami (SIT) VLD2023-45 ICD2023-53 DC2023-52 RECONF2023-48
Abstract (in Japanese) (See Japanese page) 
(in English) Non-Volatile Flip Flops (NVFF) using Magnetic Tunnel Junction (MTJ) enable non-volatile power gating and reduce leakage power. However, MTJ has the problem of high write energy. Conventional NVFFs write to two MTJs per NVFF because they read using the difference between the high and low resistance of the MTJs. However, it is not necessary to write to two MTJs, if they can be accurately read using one MTJ and a reference resistor whose resistance value is fixed between high and low resistance. In this study, we propose an NVFF circuit that has a reference resistor and writes to only one MTJ to reduce energy. We conducted circuit design and layout in the 65nm process technology. Simulation results demonstrated that the write energy was reduced by 51~58% while suppressing the area overhead to 6%.
Keyword (in Japanese) (See Japanese page) 
(in English) MTJ / Non-volatile flip-flops / Power Gating / / / / /  
Reference Info. IEICE Tech. Rep., vol. 123, no. 258, VLD2023-45, pp. 88-93, Nov. 2023.
Paper # VLD2023-45 
Date of Issue 2023-11-08 (VLD, ICD, DC, RECONF) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2023-45 ICD2023-53 DC2023-52 RECONF2023-48

Conference Information
Committee VLD DC RECONF ICD IPSJ-SLDM  
Conference Date 2023-11-15 - 2023-11-17 
Place (in Japanese) (See Japanese page) 
Place (in English) Civic Auditorium Sears Home Yume Hall 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2023 -New Field of VLSI Design- 
Paper Information
Registration To VLD 
Conference Code 2023-11-VLD-DC-RECONF-ICD-SLDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Proposal of MTJ-based non-volatile flip-flops using reference resistance and Two-step Store Control 
Sub Title (in English)  
Keyword(1) MTJ  
Keyword(2) Non-volatile flip-flops  
Keyword(3) Power Gating  
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1st Author's Name Kousei Kaizu  
1st Author's Affiliation Shibaura Institute of Technology (SIT)
2nd Author's Name Kimiyoshi Usami  
2nd Author's Affiliation Shibaura Institute of Technology (SIT)
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Speaker Author-1 
Date Time 2023-11-16 10:20:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2023-45, ICD2023-53, DC2023-52, RECONF2023-48 
Volume (vol) vol.123 
Number (no) no.258(VLD), no.259(ICD), no.260(DC), no.261(RECONF) 
Page pp.88-93 
#Pages 6 
Date of Issue 2023-11-08 (VLD, ICD, DC, RECONF) 

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