| 講演抄録/キーワード |
| 講演名 |
2024-01-23 13:35
[招待講演]Research on Novel Binary Neural Processing Elements Using Single Flux Quantum Circuits ○Zeyu Han・Zongyuan Li・Yamanashi Yuki・Yoshikawa Nobuyuki(Yokohama National Univ.) SCE2023-23 |
| 抄録 |
(和) |
(まだ登録されていません) |
| (英) |
Superconducting convolutional neural networks, based on single flux quantum (SFQ) circuits, hold significant potential due to their high-speed operation and low power consumption. However, the floating-point multiply and accumulate (MAC) operations used in neural networks are challenging to implement due to the limitations of the integration density of the current SFQ circuit fabrication process. The binary neural network transforms the floating-point MAC operations into exclusive-NOR (XNOR) and bitcount operations by binarizing the weights of the neural networks and the input feature values. Our proposed processing elements (PEs) introduce novel solutions to enhance the circuit area efficiency from two key perspectives. Firstly, the implementation of an in-memory XNOR gate enables efficient in-memory computation, minimizing data transmission between memory and the PE. Secondly, the transformation of the bitcount operation into time-domain addition results in a circuits area reduction. We simulated and estimated the proposed binary in-memory and time-domain PEs which don’t need the weights buffer and have ability to reduce approximate 60% circuits area for the 3x3 binary convolution circuits. |
| キーワード |
(和) |
/ / / / / / / |
| (英) |
Binary Neural Network / Processing Elements / Single Flux Quantum Circuits / / / / / |
| 文献情報 |
信学技報, vol. 123, no. 353, SCE2023-23, pp. 1-6, 2024年1月. |
| 資料番号 |
SCE2023-23 |
| 発行日 |
2024-01-16 (SCE) |
| ISSN |
Online edition: ISSN 2432-6380 |
著作権に ついて |
技術研究報告に掲載された論文の著作権は電子情報通信学会に帰属します.(許諾番号:10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
| PDFダウンロード |
SCE2023-23 |