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Paper Abstract and Keywords
Presentation 2024-01-29 17:25
Comparison of latch-based circuit and flip-flop-based circuit in actual device
Kenji Takahashi, Tadaaki Tanimoto, Keizo Hiraga, Masayuki Hayashi, Takato Inoue, Kazuhiro Bessho, Toshimasa Shimizu (Sony Semiconductor Solutions) VLD2023-91 RECONF2023-94
Abstract (in Japanese) (See Japanese page) 
(in English) The comparison results of current consumption, maximum operating frequency (Fmax) characteristics and minimum operating voltage (Vmin) characteristics of latch-based circuit and flip-flop-based circuit are reported. The latch-based circuit has low current consumption under certain conditions, high Fmax at the same voltage and low Vmin at the same frequency. This shows that the latch-based circuit can reduce power at the same frequency compared with the flip-flop-based circuit.
Keyword (in Japanese) (See Japanese page) 
(in English) Latch / Power Consumption / Highest Operating Frequency / Lowest Operating Voltage / Schmoo Plot / Real Device Measurement / /  
Reference Info. IEICE Tech. Rep., vol. 123, no. 373, VLD2023-91, pp. 65-70, Jan. 2024.
Paper # VLD2023-91 
Date of Issue 2024-01-22 (VLD, RECONF) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2023-91 RECONF2023-94

Conference Information
Committee RECONF VLD  
Conference Date 2024-01-29 - 2024-01-30 
Place (in Japanese) (See Japanese page) 
Place (in English) AIRBIC Meeting Room 1-4 
Topics (in Japanese) (See Japanese page) 
Topics (in English) FPGA Applications, etc. 
Paper Information
Registration To VLD 
Conference Code 2024-01-RECONF-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Comparison of latch-based circuit and flip-flop-based circuit in actual device 
Sub Title (in English)  
Keyword(1) Latch  
Keyword(2) Power Consumption  
Keyword(3) Highest Operating Frequency  
Keyword(4) Lowest Operating Voltage  
Keyword(5) Schmoo Plot  
Keyword(6) Real Device Measurement  
Keyword(7)  
Keyword(8)  
1st Author's Name Kenji Takahashi  
1st Author's Affiliation Sony Semiconductor Solutions Corporation (Sony Semiconductor Solutions)
2nd Author's Name Tadaaki Tanimoto  
2nd Author's Affiliation Sony Semiconductor Solutions Corporation (Sony Semiconductor Solutions)
3rd Author's Name Keizo Hiraga  
3rd Author's Affiliation Sony Semiconductor Solutions Corporation (Sony Semiconductor Solutions)
4th Author's Name Masayuki Hayashi  
4th Author's Affiliation Sony Semiconductor Solutions Corporation (Sony Semiconductor Solutions)
5th Author's Name Takato Inoue  
5th Author's Affiliation Sony Semiconductor Solutions Corporation (Sony Semiconductor Solutions)
6th Author's Name Kazuhiro Bessho  
6th Author's Affiliation Sony Semiconductor Solutions Corporation (Sony Semiconductor Solutions)
7th Author's Name Toshimasa Shimizu  
7th Author's Affiliation Sony Semiconductor Solutions Corporation (Sony Semiconductor Solutions)
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Speaker Author-1 
Date Time 2024-01-29 17:25:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2023-91, RECONF2023-94 
Volume (vol) vol.123 
Number (no) no.373(VLD), no.374(RECONF) 
Page pp.65-70 
#Pages 6 
Date of Issue 2024-01-22 (VLD, RECONF) 

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