| Conference Information |
| Committee |
ICD |
| Conference Date |
2024-04-11 - 2024-04-12 |
| Place (in Japanese) |
(See Japanese page) |
| Place (in English) |
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| Topics (in Japanese) |
(See Japanese page) |
| Topics (in English) |
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| Paper Information |
| Registration To |
ICD |
| Conference Code |
2024-04-ICD |
| Language |
Japanese |
| Title (in Japanese) |
(See Japanese page) |
| Sub Title (in Japanese) |
(See Japanese page) |
| Title (in English) |
3.7-GHz Multi-Bank High-Current Single-Port Cache SRAM with 0.5V-1.4V Wide Voltage Range Operation in 3nm FinFET for HPC Applications |
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| 1st Author's Name |
Yoshiaki Osada |
| 1st Author's Affiliation |
TSMC Design Technology Japan (TSMC) |
| 2nd Author's Name |
Takaaki Nakazato |
| 2nd Author's Affiliation |
TSMC Design Technology Japan (TSMC) |
| 3rd Author's Name |
Koji Nii |
| 3rd Author's Affiliation |
TSMC Design Technology Japan (TSMC) |
| 4th Author's Name |
Jhon-Jhy Liaw |
| 4th Author's Affiliation |
TSMC (TSMC) |
| 5th Author's Name |
Shien-Yang Michael Wu |
| 5th Author's Affiliation |
TSMC (TSMC) |
| 6th Author's Name |
Quincy Li |
| 6th Author's Affiliation |
TSMC (TSMC) |
| 7th Author's Name |
Hidehiro Fujiwara |
| 7th Author's Affiliation |
TSMC (TSMC) |
| 8th Author's Name |
Hung-Jen Liao |
| 8th Author's Affiliation |
TSMC (TSMC) |
| 9th Author's Name |
Tsung-Yung Jonathan Chang |
| 9th Author's Affiliation |
TSMC (TSMC) |
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| Speaker |
Author-1 |
| Date Time |
2024-04-12 15:20:00 |
| Presentation Time |
25 minutes |
| Registration for |
ICD |
| Paper # |
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| Volume (vol) |
vol.124 |
| Number (no) |
no.3 |
| Page |
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| #Pages |
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| Date of Issue |
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