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Paper Abstract and Keywords
Presentation 2024-08-06 11:25
Reducing short-circuit current of CMOS Inverter circuits with “PN-Body Tied SOI-FET”
Kazuki Nakahashi, Takayuki Mori, Jiro Ida (Kanazawa Institute of Technology) SDM2024-36 ICD2024-26
Abstract (in Japanese) (See Japanese page) 
(in English) In this study, we report the results of Short-Circuit current measurements in a CMOS inverter circuit using a "PN-Body Tied (PNBT) SOI-FET" with a steep subthreshold slope (SS). The measurements were performed by superposing the NMOS and PMOS SS voltage values, and the results showed very low Short-Circuit currents. This indicates the possibility that the Steep Slope Device can reduce the through-current to almost zero.
Keyword (in Japanese) (See Japanese page) 
(in English) CMOS Inverter / SOI / Steep Subthreshold Slope / / / / /  
Reference Info. IEICE Tech. Rep., vol. 124, no. 145, SDM2024-36, pp. 38-41, Aug. 2024.
Paper # SDM2024-36 
Date of Issue 2024-07-29 (SDM, ICD) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SDM2024-36 ICD2024-26

Conference Information
Committee SDM ICD ITE-IST  
Conference Date 2024-08-05 - 2024-08-07 
Place (in Japanese) (See Japanese page) 
Place (in English) Hokkaido Univ. Multimedia Education Bldg. 3F 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Analog, Mixed Analog and Digital, RF, and Sensor Interface, Low Voltage/Low Power Techniques, Novel Devices/Circuits, and the Applications 
Paper Information
Registration To SDM 
Conference Code 2024-08-SDM-ICD-IST 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Reducing short-circuit current of CMOS Inverter circuits with “PN-Body Tied SOI-FET” 
Sub Title (in English)  
Keyword(1) CMOS Inverter  
Keyword(2) SOI  
Keyword(3) Steep Subthreshold Slope  
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1st Author's Name Kazuki Nakahashi  
1st Author's Affiliation Kanazawa Institute of Technology (Kanazawa Institute of Technology)
2nd Author's Name Takayuki Mori  
2nd Author's Affiliation Kanazawa Institute of Technology (Kanazawa Institute of Technology)
3rd Author's Name Jiro Ida  
3rd Author's Affiliation Kanazawa Institute of Technology (Kanazawa Institute of Technology)
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Speaker Author-1 
Date Time 2024-08-06 11:25:00 
Presentation Time 25 minutes 
Registration for SDM 
Paper # SDM2024-36, ICD2024-26 
Volume (vol) vol.124 
Number (no) no.145(SDM), no.146(ICD) 
Page pp.38-41 
#Pages 4 
Date of Issue 2024-07-29 (SDM, ICD) 

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