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Paper Abstract and Keywords
Presentation 2024-11-04 13:45
[Poster Presentation] A Study on Temperature-Aware Clock Drift Estimation Method for Packet-Level Index Modulation
Hitoshi Yamasaki (Fukuoka Univ.), Hiroki Matsuura (NATANE eICT Lab.), Mai Ohta, Makoto Taromaru (Fukuoka Univ.) SR2024-52
Abstract (in Japanese) (See Japanese page) 
(in English) In recent years, Low Power Wide Area (LPWA) technology is expected for Internet of Things (IoT) systems. To increase the transmit bits of LPWA, a packet-level index modulation has been proposed, which assigns bits to time slot and frequency channel indexes for packet transmission. However, clock drift between the transmitter and receiver can lead to PLIM errors in detecting time slot indexes so the clock drift estimation and compensation has been proposed. Previous works have modeled a short-term clock drift using a normal distribution. However, since clock drift changes with temperature, clock drift compensation in a long-term requires to decrease PLIM errors. Therefore this paper proposes a temperature-aware clock drift estimation method. After modeling the clock drift observed in actual devices, the error between the actual value and the value obtained by the proposed estimation method is evaluated, and it is shown that the proposed method can correct the clock drift considering the temperature.
Keyword (in Japanese) (See Japanese page) 
(in English) Low Power Wide Area (LPWA) / LoRaWAN / Packet-Level Index Modulation (PLIM) / Clock drift estimation / / / /  
Reference Info. IEICE Tech. Rep., vol. 124, no. 233, SR2024-52, pp. 13-14, Nov. 2024.
Paper # SR2024-52 
Date of Issue 2024-10-28 (SR) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SR2024-52

Conference Information
Committee SR  
Conference Date 2024-11-04 - 2024-11-07 
Place (in Japanese) (See Japanese page) 
Place (in English) Fraunhofer IPT 
Topics (in Japanese) (See Japanese page) 
Topics (in English) SmartCom2024 
Paper Information
Registration To SR 
Conference Code 2024-11-SR 
Language English 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Study on Temperature-Aware Clock Drift Estimation Method for Packet-Level Index Modulation 
Sub Title (in English)  
Keyword(1) Low Power Wide Area (LPWA)  
Keyword(2) LoRaWAN  
Keyword(3) Packet-Level Index Modulation (PLIM)  
Keyword(4) Clock drift estimation  
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Keyword(6)  
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1st Author's Name Hitoshi Yamasaki  
1st Author's Affiliation Fukuoka University (Fukuoka Univ.)
2nd Author's Name Hiroki Matsuura  
2nd Author's Affiliation NATANE eICT Lab. (NATANE eICT Lab.)
3rd Author's Name Mai Ohta  
3rd Author's Affiliation Fukuoka University (Fukuoka Univ.)
4th Author's Name Makoto Taromaru  
4th Author's Affiliation Fukuoka University (Fukuoka Univ.)
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Speaker Author-1 
Date Time 2024-11-04 13:45:00 
Presentation Time 60 minutes 
Registration for SR 
Paper # SR2024-52 
Volume (vol) vol.124 
Number (no) no.233 
Page pp.13-14 
#Pages 2 
Date of Issue 2024-10-28 (SR) 

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