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Paper Abstract and Keywords
Presentation 2025-03-06 14:25
Implementation Method and Circuit Fabrication for Photonic Circuits of Symmetric Key Cryptography
Junko Takahashi, Shota Kita, Akihiko Shinya (NTT), Kazumaro Aoki (Bunkyo Univ), Koji Chida (Gunma Univ), Fumitaka Hoshino (Univ. of Nagasaki) VLD2024-117 HWS2024-88 ICD2024-108
Abstract (in Japanese) (See Japanese page) 
(in English) Recently, photonic computing has been widely studied. Among them, photonic cryptographic circuits have also been presented. In the previous studies, an implementation method for symmetric key cryptography were proposed using photonic circuits and the operation of them was verified. However, no research has been studied on the entire cryptographic operation in photonic circuits. This paper proposes an implementation method using photonic logic gates for a one-round operation of 4-bit input and output based on PRESENT. In addition, based on the proposed method, photonic circuits for the entire round are fabricated using silicon photonics technology. The delay is about 300ps from the size of the circuit, and it can be calculated with low latency.
Keyword (in Japanese) (See Japanese page) 
(in English) Photonic Cryptographic Circuits / Photonic Logic Gates / Photonic Computing / Optical Security / Silicon Photonics / / /  
Reference Info. IEICE Tech. Rep., vol. 124, no. 401, HWS2024-88, pp. 84-89, March 2025.
Paper # HWS2024-88 
Date of Issue 2025-02-26 (VLD, HWS, ICD) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2024-117 HWS2024-88 ICD2024-108

Conference Information
Committee HWS ICD VLD  
Conference Date 2025-03-05 - 2025-03-08 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To HWS 
Conference Code 2025-03-HWS-ICD-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Implementation Method and Circuit Fabrication for Photonic Circuits of Symmetric Key Cryptography 
Sub Title (in English)  
Keyword(1) Photonic Cryptographic Circuits  
Keyword(2) Photonic Logic Gates  
Keyword(3) Photonic Computing  
Keyword(4) Optical Security  
Keyword(5) Silicon Photonics  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Junko Takahashi  
1st Author's Affiliation NTT Social Informatics Laboratories (NTT)
2nd Author's Name Shota Kita  
2nd Author's Affiliation NTT Basic Research Laboratories (NTT)
3rd Author's Name Akihiko Shinya  
3rd Author's Affiliation NTT Basic Research Laboratories (NTT)
4th Author's Name Kazumaro Aoki  
4th Author's Affiliation Bunkyo University (Bunkyo Univ)
5th Author's Name Koji Chida  
5th Author's Affiliation Gunma University (Gunma Univ)
6th Author's Name Fumitaka Hoshino  
6th Author's Affiliation University of Nagasaki (Univ. of Nagasaki)
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Speaker Author-1 
Date Time 2025-03-06 14:25:00 
Presentation Time 25 minutes 
Registration for HWS 
Paper # VLD2024-117, HWS2024-88, ICD2024-108 
Volume (vol) vol.124 
Number (no) no.400(VLD), no.401(HWS), no.402(ICD) 
Page pp.84-89 
#Pages 6 
Date of Issue 2025-02-26 (VLD, HWS, ICD) 

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