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Paper Abstract and Keywords
Presentation 2025-07-07 17:30
A Study on EM Side-Channel Attack Prediction Model for SoC/FPGA-Based Printed Circuit Board Design
Soma Tanimoto, Masaki Himuro, Kengo Iokibe, Yoshitaka Toyota (Okayama Univ.) ISEC2025-30 SITE2025-20 BioX2025-44 HWS2025-19 ICSS2025-30 EMM2025-33
Abstract (in Japanese) (See Japanese page) 
(in English) Side-channel attacks (SCAs) analyze physical leakages from cryptographic circuits to break encryption and pose a significant security threat.
To develop secure cryptographic devices, evaluating and mitigating SCAs is essential.
Predicting SCA results during the design stage is important for reducing development costs.

We previously proposed a method to predict power analysis (PA) attacks on printed circuit board (PCB) designs with cryptographic ICs.
Besides PA, electromagnetic analysis (EMA) is another SCA technique.
Although EMA attack prediction from IC-emitted fields has been studied, prior work did not target PCB designs.

This paper extends our PA prediction method to EMA, focusing on PCB applications.
We predict electromagnetic fields in different directions at measurement points on a board with an AES-128 SoC FPGA and perform correlation electromagnetic analysis (CEMA).
The predicted leakage frequency bands matched measured results, and the CEMA attack success rate aligned well at the strongest leakage frequency.
Keyword (in Japanese) (See Japanese page) 
(in English) EM Side-Channel Attack / Simulation / Resistance Evaluation / SoC FPGA / Correlation Electromagnetic Analysis / AES / EM Noise /  
Reference Info. IEICE Tech. Rep., vol. 125, no. 102, HWS2025-19, pp. 86-91, July 2025.
Paper # HWS2025-19 
Date of Issue 2025-06-30 (ISEC, SITE, BioX, HWS, ICSS, EMM) 
ISSN Online edition: ISSN 2432-6380
Copyright
and
reproduction		 All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ISEC2025-30 SITE2025-20 BioX2025-44 HWS2025-19 ICSS2025-30 EMM2025-33

Conference Information
Committee HWS BioX ISEC SITE ICSS EMM IPSJ-CSEC IPSJ-SPT 
Conference Date 2025-07-07 - 2025-07-09 
Place (in Japanese) (See Japanese page) 
Place (in English) Sapporo Convention Center 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To HWS 
Conference Code 2025-07-HWS-BioX-ISEC-SITE-ICSS-EMM-CSEC-SPT 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Study on EM Side-Channel Attack Prediction Model for SoC/FPGA-Based Printed Circuit Board Design 
Sub Title (in English)  
Keyword(1) EM Side-Channel Attack  
Keyword(2) Simulation  
Keyword(3) Resistance Evaluation  
Keyword(4) SoC FPGA  
Keyword(5) Correlation Electromagnetic Analysis  
Keyword(6) AES  
Keyword(7) EM Noise  
Keyword(8)  
1st Author's Name Soma Tanimoto  
1st Author's Affiliation Okayama University (Okayama Univ.)
2nd Author's Name Masaki Himuro  
2nd Author's Affiliation Okayama University (Okayama Univ.)
3rd Author's Name Kengo Iokibe  
3rd Author's Affiliation Okayama University (Okayama Univ.)
4th Author's Name Yoshitaka Toyota  
4th Author's Affiliation Okayama University (Okayama Univ.)
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Speaker Author-1 
Date Time 2025-07-07 17:30:00 
Presentation Time 25 minutes 
Registration for HWS 
Paper # ISEC2025-30, SITE2025-20, BioX2025-44, HWS2025-19, ICSS2025-30, EMM2025-33 
Volume (vol) vol.125 
Number (no) no.99(ISEC), no.100(SITE), no.101(BioX), no.102(HWS), no.103(ICSS), no.104(EMM) 
Page pp.86-91 
#Pages 6 
Date of Issue 2025-06-30 (ISEC, SITE, BioX, HWS, ICSS, EMM) 

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